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@@ -1,11 +1,15 @@ |
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: ACIA$ |
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H@ [ ACIA( LITN ] ! 0 [ ACIAR> LITN ] C! |
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1 [ ACIAW> LITN ] C! ( write index starts one pos later ) |
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[ ACIA_BUFSZ LITN ] ALLOT |
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( setup ACIA |
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CR7 (1) - Receive Interrupt enabled |
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CR6:5 (00) - RTS low, transmit interrupt disabled. |
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CR4:2 (101) - 8 bits + 1 stop bit |
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CR1:0 (10) - Counter divide: 64 ) |
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0b10010110 [ ACIA_CTL LITN ] PC! |
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(im1) ; |
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( INT handler. Set RST 38 jump ) PC ORG @ 0x39 + ! |
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AF PUSH, BEGIN, |
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SIO_ACTL INAi, ( RR0 ) 0x01 ANDi, ( is recv buf full? ) |
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IFZ, ( nope, exit ) A 0x20 ( CMD 4 ) LDri, SIO_ACTL OUTiA, |
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AF POP, EI, RETI, THEN, |
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HL PUSH, |
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HL SIOW> LDdi, A (HL) LDrr, |
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HL DECd, (HL) CPr, ( W> == R> ? ) |
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IFNZ, ( buffer not full ) |
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( get wr ptr ) HL SIO( LDd(i), |
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L ADDr, IFC, H INCr, THEN, L A LDrr, |
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( fetch/write ) SIO_ADATA INAi, (HL) A LDrr, |
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( advance W> ) SIOW> LDA(i), A INCr, |
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SIO_BUFSZ 1- ANDi, SIOW> LD(i)A, |
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THEN, HL POP, JR, AGAIN, |