diff --git a/blk/281 b/blk/281
index 93a47bb..3b5543e 100644
--- a/blk/281
+++ b/blk/281
@@ -9,4 +9,7 @@ esses. The rest of the Collapse OS code depend on it. In fact,
 up until 0x67, the (?br) wordref, pretty much everything has
 to stay put.
 
-To assemble, run "282 LOAD".
+The boot binary is loaded in 2 parts. The first part, "decla-
+rations", are loaded after xcomp, before xcomp overrides, with
+"282 LOAD". The rest, after xcomp overrides, with "283 335
+LOADR".
diff --git a/blk/282 b/blk/282
index bc7528b..043a090 100644
--- a/blk/282
+++ b/blk/282
@@ -1,3 +1,2 @@
 VARIABLE lblofl VARIABLE lblpushRS VARIABLE lblexec
 VARIABLE lblfind
-1 53 LOADR+
diff --git a/blk/618 b/blk/618
index 2a1e41e..ab903a7 100644
--- a/blk/618
+++ b/blk/618
@@ -5,9 +5,9 @@
 5      CONSTANT SDC_CSLOW      6      CONSTANT SDC_CSHIGH
 RAMSTART 0x70 + CONSTANT ACIA_MEM
 212 LOAD  ( z80 assembler )
-262 LOAD  ( xcomp )            270 LOAD  ( xcomp overrides )
-282 LOAD  ( boot.z80 )         353 LOAD  ( xcomp core low )
-582 LOAD  ( acia )
+262 LOAD  ( xcomp )            282 LOAD  ( boot.z80.decl )
+270 LOAD  ( xcomp overrides )  283 335 LOADR ( boot.z80 )
+353 LOAD  ( xcomp core low )   582 LOAD  ( acia )
 380 LOAD  ( xcomp core high )
 (entry) _
 ( Update LATEST )
diff --git a/emul/xcomp.fs b/emul/xcomp.fs
index a8c48a7..bafe6ab 100644
--- a/emul/xcomp.fs
+++ b/emul/xcomp.fs
@@ -3,9 +3,9 @@
 0xfffa CONSTANT PS_ADDR
 212 LOAD  ( z80 assembler )
 262 LOAD  ( xcomp )
+282 LOAD  ( boot.z80.decl )
 270 LOAD  ( xcomp overrides )
-
-282 LOAD  ( boot.z80 )
+283 335 LOADR ( boot.z80 )
 353 LOAD  ( xcomp core low )
 : (emit) 0 PC! ;
 : (key) 0 PC@ ;
diff --git a/recipes/sms/xcomp.fs b/recipes/sms/xcomp.fs
index 52eddc9..7b51b87 100644
--- a/recipes/sms/xcomp.fs
+++ b/recipes/sms/xcomp.fs
@@ -15,6 +15,7 @@ RAMSTART 0x72 + CONSTANT PAD_MEM
 : ZFILL, ( u ) 0 DO 0 A, LOOP ;
 262 LOAD  ( xcomp )
 524 LOAD  ( font compiler )
+282 LOAD  ( boot.z80.decl )
 270 LOAD  ( xcomp overrides )
 
 0x100 JPnn, 0x63 ZFILL, ( 0x66 )
@@ -22,7 +23,7 @@ RETN, 0x98 ZFILL, ( 0x100 )
 ( All set, carry on! )
 CURRENT @ XCURRENT !
 0x100 BIN( !
-282 LOAD  ( boot.z80 )
+283 335 LOADR ( boot.z80 )
 353 LOAD  ( xcomp core low )
 CREATE ~FNT CPFNT7x7
 623 628 LOADR ( VDP )
diff --git a/recipes/ti84/xcomp.fs b/recipes/ti84/xcomp.fs
index 5a0569e..fc5aab5 100644
--- a/recipes/ti84/xcomp.fs
+++ b/recipes/ti84/xcomp.fs
@@ -8,6 +8,7 @@ RAMSTART 0x72 + CONSTANT KBD_MEM
 : ZFILL, ( u ) 0 DO 0 A, LOOP ;
 262 LOAD  ( xcomp )
 522 LOAD  ( font compiler )
+282 LOAD  ( boot.z80.decl )
 270 LOAD  ( xcomp overrides )
 
 ( TI-84+ requires specific code at specific offsets which
@@ -59,7 +60,7 @@ HALT,
 CURRENT @ XCURRENT !
 
 0x100 BIN( !
-282 LOAD  ( boot.z80 )
+283 335 LOADR ( boot.z80 )
 353 LOAD  ( xcomp core low )
 CREATE ~FNT CPFNT3x5
 555 560 LOADR ( LCD low )
diff --git a/recipes/trs80/xcomp.fs b/recipes/trs80/xcomp.fs
index 48fb3ba..fb8bafc 100644
--- a/recipes/trs80/xcomp.fs
+++ b/recipes/trs80/xcomp.fs
@@ -1,15 +1,15 @@
 0xff00 CONSTANT RS_ADDR
 0xfffa CONSTANT PS_ADDR
 RS_ADDR 0x80 - CONSTANT RAMSTART
-212 LOAD  ( z80 assembler )
-262 LOAD  ( xcomp )
-270 LOAD  ( xcomp overrides )
-
+212 LOAD ( z80 assembler )
+262 LOAD ( xcomp )
+282 LOAD ( boot.z80.decl )
+270 LOAD ( xcomp overrides )
 0x3000 BIN( !
-282 LOAD  ( boot.z80 )
-353 LOAD  ( xcomp core low )
-492 LOAD  ( trs80 )
-380 LOAD  ( xcomp core high )
+283 335 LOADR ( boot.z80 )
+353 LOAD ( xcomp core low )
+492 LOAD ( trs80 )
+380 LOAD ( xcomp core high )
 (entry) _
 ( Update LATEST )
 PC ORG @ 8 + !
diff --git a/recipes/z80mbc2/xcomp.fs b/recipes/z80mbc2/xcomp.fs
index f4a0e16..1f709c2 100644
--- a/recipes/z80mbc2/xcomp.fs
+++ b/recipes/z80mbc2/xcomp.fs
@@ -1,8 +1,11 @@
 0xff00 CONSTANT RS_ADDR        0xfffa CONSTANT PS_ADDR
 RS_ADDR 0x80 - CONSTANT RAMSTART
 212 LOAD  ( z80 assembler )
-262 LOAD  ( xcomp )            270 LOAD  ( xcomp overrides )
-282 LOAD  ( boot.z80 )         353 LOAD  ( xcomp core low )
+262 LOAD  ( xcomp )
+282 LOAD  ( boot.z80.decl )
+270 LOAD  ( xcomp overrides )
+283 335 LOADR ( boot.z80 )
+353 LOAD  ( xcomp core low )
 CODE (emit)
     A 1 LDrn, 1 OUTnA, HL POPqq, A L LDrr, 0 OUTnA,
 ;CODE