rc2014/acia: adjust to latest developments

drv/acia.fs

@@ -15,6 +15,18 @@ ACIA_MEM: Address in memory that can be used variables shared
 
 0x20 CONSTANT ACIABUFSZ
 
+( Points to ACIA buf )
+: ACIA( [ ACIA_MEM 4 + LITN ] ;
+( Points to ACIA buf end )
+: ACIA) [ ACIA_MEM 6 + LITN ] ;
+( Read buf pointer. Pre-inc )
+: ACIAR> [ ACIA_MEM LITN ] ;
+( Write buf pointer. Post-inc )
+: ACIAW> [ ACIA_MEM 2 + LITN ] ;
+( This means that if W> == R>, buffer is full.
+  If R>+1 == W>, buffer is empty. )
+
+
 : ACIA$
     H@ DUP DUP ACIA( ! ACIAR> !
     1 + ACIAW> ! ( write index starts one position later )

drv/acia.z80

@@ -3,18 +3,16 @@ ACIA_CTL
 : ACIA_CTL [ LITN ] ;
 ACIA_IO
 : ACIA_IO [ LITN ] ;
-( Points to ACIA buf )
+ACIA_MEM
-: ACIA( [ ACIA_MEM 4 + LITN ] ;
+: ACIA_MEM [ LITN ] ;
-( Points to ACIA buf end )
+( Memory layout
-: ACIA) [ ACIA_MEM 6 + LITN ] ;
+  +0 ACIAR>
-( Read buf pointer. Pre-inc )
+  +2 ACIAW>
-: ACIAR> [ ACIA_MEM LITN ] ;
+  +4 ACIA(
-( Write buf pointer. Post-inc )
+  +6 ACIA)
-: ACIAW> [ ACIA_MEM 2 + LITN ] ;
+)
-( This means that if W> == R>, buffer is full.
-  If R>+1 == W>, buffer is empty. )
 
-(entry) ~ACIA
+(xentry) ~ACIA
     AF PUSHqq,
     HL PUSHqq,
     DE PUSHqq,
@@ -24,9 +22,11 @@ ACIA_IO
     0x01 ANDn,   ( is ACIA rcv buf full? )
     JRZ, L2 FWR ( end, no, wrong interrupt cause. )
 
-    ACIAW> LDHL(nn),
+    ( +2 == ACIAW> )
+    ACIA_MEM 2 + LDHL(nn),
     ( is it == to ACIAR>? )
-    DE ACIAR> LDdd(nn),
+    ( +0 == ACIAR> )
+    DE ACIA_MEM LDdd(nn),
     ( carry cleared from ANDn above )
     DE SBCHLss,
     JRZ, L3 FWR ( end, buffer full )
@@ -38,13 +38,17 @@ ACIA_IO
 
     ( advance W> )
     HL INCss,
-    ACIAW> LD(nn)HL,
+    ( +2 == ACIAW> )
-    DE ACIA) LDdd(nn),
+    ACIA_MEM 2 + LD(nn)HL,
+    ( +6 == ACIA) )
+    DE ACIA_MEM 6 + LDdd(nn),
     DE SUBHLss,
     JRNZ, L4 FWR ( skip )
     ( end of buffer reached )
-    ACIA( LDHL(nn),
+    ( +4 == ACIA( )
-    ACIAW> LD(nn)HL,
+    ACIA_MEM 4 + LDHL(nn),
+    ( +2 == ACIAW> )
+    ACIA_MEM 2 + LD(nn)HL,
 L4 FSET ( skip )
 L3 FSET L2 FSET ( end )
 

forth/fmt.fs

@@ -1,4 +1,4 @@
-( requires core, parse )
+( requires core, parse, cmp )
 
 : _
     999 SWAP        ( stop indicator )

recipes/rc2014/Makefile

@@ -4,8 +4,18 @@ FDIR = $(BASEDIR)/forth
 EDIR = $(BASEDIR)/emul/forth
 STAGE2 = $(EDIR)/stage2
 EMUL = $(BASEDIR)/emul/hw/rc2014/classic
+BOOTSRCS = conf.fs \
+	$(FDIR)/xcomp.fs \
+	$(EDIR)/xcomp.fs \
+	$(FDIR)/boot.fs \
+	$(FDIR)/z80c.fs \
+	$(BASEDIR)/drv/acia.z80 \
+	$(FDIR)/icore.fs \
+	$(EDIR)/xstop.fs
+
 PATHS = pre.fs \
 	$(FDIR)/core.fs \
+	$(FDIR)/cmp.fs \
 	$(FDIR)/str.fs \
 	$(FDIR)/parse.fs \
 	$(BASEDIR)/drv/acia.fs \
@@ -18,16 +28,13 @@ STRIPFC = $(BASEDIR)/tools/stripfc
 
 .PHONY: all
 all: $(TARGET) 
-$(TARGET): boot.bin z80c.bin $(SLATEST) $(PATHS)
+$(TARGET): z80c.bin $(SLATEST) $(PATHS)
-	cat boot.bin z80c.bin > $@
+	cp z80c.bin $@
 	$(SLATEST) $@
 	cat $(PATHS) | $(STRIPFC) >> $@
 
-z80c.bin: boot.bin
+z80c.bin: conf.fs
-	cat conf.fs $(FDIR)/z80c.fs $(BASEDIR)/drv/acia.z80 $(FDIR)/icore.fs | $(STAGE2) | tee $@ > /dev/null
+	cat $(BOOTSRCS) | $(STAGE2) > $@
-
-boot.bin: conf.fs
-	cat conf.fs $(FDIR)/boot.fs | $(STAGE2) | tee $@ > /dev/null
 
 $(SLATEST):
 	$(MAKE) -C $(BASEDIR)/tools

recipes/rc2014/pre.fs

@@ -1 +1 @@
-96 RAM+ HERE !
+128 RAM+ HERE !