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( Receives keystrokes from PS/2 keyboard and send them to the |
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'164. On the PS/2 side, it works the same way as the controller |
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in the rc2014/ps2 recipe. However, in this case, what we have |
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on the other side isn't a z80 bus, it's the one of the two |
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controller ports of the SMS through a DB9 connector. |
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The PS/2 related code is copied from rc2014/ps2 without much |
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change. The only differences are that it pushes its data to a |
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'164 instead of a '595 and that it synchronizes with the SMS |
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with a SR latch, so we don't need PCINT. We can also afford to |
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run at 1MHz instead of 8. |
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*** Register Usage *** |
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GPIOR0 flags: |
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0 - when set, indicates that the DATA pin was high when we |
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received a bit through INT0. When we receive a bit, we set |
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flag T to indicate it. |
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R16: tmp stuff |
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R17: recv buffer. Whenever we receive a bit, we push it in |
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there. |
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R18: recv step: |
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- 0: idle |
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- 1: receiving data |
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- 2: awaiting parity bit |
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- 3: awaiting stop bit |
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R19: Register used for parity computations and tmp value in |
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some other places |
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R20: data being sent to the '164 |
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Y: pointer to the memory location where the next scan code from |
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ps/2 will be written. |
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Z: pointer to the next scan code to push to the 595 ) |
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0x015f CONSTANT RAMEND |
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0x11 CONSTANT GPIOR0 |
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0x16 CONSTANT PINB |
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1 CONSTANT DATA |
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H@ ORG ! |
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L1 FLBL, ( main ) |
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L2 FLBL, ( hdlINT0 ) |
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( Read DATA and set GPIOR0/0 if high. Then, set flag T. |
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no SREG fiddling because no SREG-modifying instruction ) |
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RJMPOP L2 FLBL! ( hdlINT0 ) |
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PINB DATA SBIC, |
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GPIOR0 0 SBI, |
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SET, |
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RETI, |
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RJMPOP L1 FLBL! ( main ) |
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16 RAMEND 0xff AND LDI, |