From 1ac7038863c9fb45f1d4414812dc33f3f1e04e6b Mon Sep 17 00:00:00 2001 From: Virgil Dupras Date: Mon, 29 Jun 2020 08:01:39 -0400 Subject: [PATCH] avra: add TOC and instructions list --- blk/650 | 17 +++-------------- blk/651 | 21 ++++++++++++++------- blk/652 | 9 +++++++++ blk/655 | 16 ++++++++++++++++ blk/656 | 16 ++++++++++++++++ blk/657 | 6 ++++++ 6 files changed, 64 insertions(+), 21 deletions(-) create mode 100644 blk/652 create mode 100644 blk/655 create mode 100644 blk/656 create mode 100644 blk/657 diff --git a/blk/650 b/blk/650 index d8ef94c..0bde4f0 100644 --- a/blk/650 +++ b/blk/650 @@ -1,16 +1,5 @@ AVR assembler -This assembler works very much like Z80 assembler (B200) so -refer to this documentation first. Here, we document specifici- -ties. - -All mnemonics in AVR have a single signature. Therefore, we -don't need any "argtype" suffixes. - -Registers are referred to with consts R0-R31. There is -X, Y, Z, X+, Y+, Z+, X-, Y-, Z- for appropriate ops (LD, ST). -XL, XH, YL, YH, ZL, ZH are simple aliases to R26-R31. - -Branching works differently. Instead of expecting a byte to be -written after the naked op, branching words expect a displace- -ment argument. (cont.) +651 Guide 655 Instructions list +660 Loader 661-672 Code +672 Common AVR consts diff --git a/blk/651 b/blk/651 index 76f5678..b29b7fa 100644 --- a/blk/651 +++ b/blk/651 @@ -1,9 +1,16 @@ -This is because there's bitwise ORing involved in the creation -of the final opcode, which makes z80a's approach impractical. +This assembler works very much like Z80 assembler (B200) so +refer to this documentation first. Here, we document specifici- +ties. -This makes labelling a bit different too. Instead of expecting -label words after the naked branching op, we rather have label -words expecting branching wordref as an argument. Examples: +All mnemonics in AVR have a single signature. Therefore, we +don't need any "argtype" suffixes. -L2 ' BRTS FLBL! ( branch forward to L2 ) -L1 ' RJMP LBL, ( branch backward to L1 ) +Registers are referred to with consts R0-R31. There is +X, Y, Z, X+, Y+, Z+, X-, Y-, Z- for appropriate ops (LD, ST). +XL, XH, YL, YH, ZL, ZH are simple aliases to R26-R31. + +Branching works differently. Instead of expecting a byte to be +written after the naked op, branching words expect a displace- +ment argument. + + (cont.) diff --git a/blk/652 b/blk/652 new file mode 100644 index 0000000..76f5678 --- /dev/null +++ b/blk/652 @@ -0,0 +1,9 @@ +This is because there's bitwise ORing involved in the creation +of the final opcode, which makes z80a's approach impractical. + +This makes labelling a bit different too. Instead of expecting +label words after the naked branching op, we rather have label +words expecting branching wordref as an argument. Examples: + +L2 ' BRTS FLBL! ( branch forward to L2 ) +L1 ' RJMP LBL, ( branch backward to L1 ) diff --git a/blk/655 b/blk/655 new file mode 100644 index 0000000..bf77661 --- /dev/null +++ b/blk/655 @@ -0,0 +1,16 @@ +AVR instructions list + +OPRd (B663) +ASR COM DEC INC LAC LAS LAT LSR NEG POP PUSH +ROR SWAP XCH + +OPRdRr (B664) +ADC ADD AND CP CPC CPSE EOR MOV MUL OR SBC +SUB + +OPRdA (B664) +IN OUT + +OPRdK (B665) +ANDI CPI LDI ORI SBCI SBR SUBI + (cont.) diff --git a/blk/656 b/blk/656 new file mode 100644 index 0000000..db63709 --- /dev/null +++ b/blk/656 @@ -0,0 +1,16 @@ +OPAb (B665) +CBI SBI SBIC SBIS + +OPNA (B666) +BREAK CL[C,H,I,N,S,T,V,Z] SE[C,H,I,N,S,T,V,Z] EIJMP ICALL +EICALL IJMP NOP RET RETI SLEEP WDR + +OPb (B667) +BCLR BSET + +OPRdb (B667) +BLD BST SBRC SBRS + +Special (B667,B670) +CLR TST LSL LD ST + (cont.) diff --git a/blk/657 b/blk/657 new file mode 100644 index 0000000..6d305be --- /dev/null +++ b/blk/657 @@ -0,0 +1,6 @@ +Flow (B668) +RJMP RCALL +BR[BC,BS,CC,CS,EQ,NE,GE,HC,HS,ID,IE,LO,LT,MI,PL,SH,TC,TS,VC,VS] + +Flow macros (B671) +LBL! LBL, SKIP, TO, FLBL, FLBL! BEGIN, AGAIN? AGAIN, IF, THEN,