@@ -1,15 +1,16 @@ | |||||
( Routines for interacting with SMS controller ports. | ( Routines for interacting with SMS controller ports. | ||||
Requires CPORT_CTL, CPORT_D1 and CPORT_D2 to be defined. | |||||
Will usually be 0x3f, 0xdc, 0xdd. ) | |||||
Requires CPORT_MEM, CPORT_CTL, CPORT_D1 and CPORT_D2 to be | |||||
defined. CPORT_MEM is a 1 byte buffer for CPORT_CTL. The last | |||||
3 consts will usually be 0x3f, 0xdc, 0xdd. ) | |||||
( mode -- set TR pin on mode a on: | ( mode -- set TR pin on mode a on: | ||||
0= output low 1=output high 2=input ) | 0= output low 1=output high 2=input ) | ||||
CODE _TRA! HL POP, chkPS, ( B0 -> B4, B1 -> B0 ) | CODE _TRA! HL POP, chkPS, ( B0 -> B4, B1 -> B0 ) | ||||
L RR, RLA, RLA, RLA, RLA, L RR, RLA, | L RR, RLA, RLA, RLA, RLA, L RR, RLA, | ||||
0x11 ANDi, L A LDrr, CPORT_CTL INAi, | |||||
0xee ANDi, L ORr, CPORT_CTL OUTiA, | |||||
0x11 ANDi, L A LDrr, CPORT_MEM LDA(i), | |||||
0xee ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A, | |||||
;CODE | ;CODE | ||||
CODE _THA! HL POP, chkPS, ( B0 -> B5, B1 -> B1 ) | CODE _THA! HL POP, chkPS, ( B0 -> B5, B1 -> B1 ) | ||||
L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, | L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, | ||||
0x22 ANDi, L A LDrr, CPORT_CTL INAi, | |||||
0xdd ANDi, L ORr, CPORT_CTL OUTiA, | |||||
0x22 ANDi, L A LDrr, CPORT_MEM LDA(i), | |||||
0xdd ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A, | |||||
;CODE | ;CODE |
@@ -1,12 +1,12 @@ | |||||
CODE _TRB! HL POP, chkPS, ( B0 -> B6, B1 -> B2 ) | CODE _TRB! HL POP, chkPS, ( B0 -> B6, B1 -> B2 ) | ||||
L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, RLA, | L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, RLA, | ||||
0x44 ANDi, L A LDrr, CPORT_CTL INAi, | |||||
0xbb ANDi, L ORr, CPORT_CTL OUTiA, | |||||
0x44 ANDi, L A LDrr, CPORT_MEM LDA(i), | |||||
0xbb ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A, | |||||
;CODE | ;CODE | ||||
CODE _THB! HL POP, chkPS, ( B0 -> B7, B1 -> B3 ) | CODE _THB! HL POP, chkPS, ( B0 -> B7, B1 -> B3 ) | ||||
L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, RLA, RLA, | L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, RLA, RLA, | ||||
0x88 ANDi, L A LDrr, CPORT_CTL INAi, | |||||
0x77 ANDi, L ORr, CPORT_CTL OUTiA, | |||||
0x88 ANDi, L A LDrr, CPORT_MEM LDA(i), | |||||
0x77 ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A, | |||||
;CODE | ;CODE | ||||
CODE _D1@ CPORT_D1 INAi, PUSHA, ;CODE | CODE _D1@ CPORT_D1 INAi, PUSHA, ;CODE | ||||
CODE _D2@ CPORT_D2 INAi, PUSHA, ;CODE | CODE _D2@ CPORT_D2 INAi, PUSHA, ;CODE |
@@ -9,10 +9,11 @@ SYSVARS 0x70 + CONSTANT VDP_MEM | |||||
0xbe CONSTANT VDP_DATAPORT | 0xbe CONSTANT VDP_DATAPORT | ||||
32 CONSTANT VDP_COLS | 32 CONSTANT VDP_COLS | ||||
24 CONSTANT VDP_ROWS | 24 CONSTANT VDP_ROWS | ||||
SYSVARS 0x72 + CONSTANT PAD_MEM | |||||
SYSVARS 0x72 + CONSTANT CPORT_MEM | |||||
0x3f CONSTANT CPORT_CTL | 0x3f CONSTANT CPORT_CTL | ||||
0xdc CONSTANT CPORT_D1 | 0xdc CONSTANT CPORT_D1 | ||||
0xdd CONSTANT CPORT_D2 | 0xdd CONSTANT CPORT_D2 | ||||
SYSVARS 0x73 + CONSTANT PAD_MEM | |||||
5 LOAD ( z80 assembler ) | 5 LOAD ( z80 assembler ) | ||||
: ZFILL, ( u ) 0 DO 0 A, LOOP ; | : ZFILL, ( u ) 0 DO 0 A, LOOP ; | ||||
262 LOAD ( xcomp ) | 262 LOAD ( xcomp ) | ||||
@@ -10,10 +10,11 @@ SYSVARS 0x70 + CONSTANT VDP_MEM | |||||
0xbe CONSTANT VDP_DATAPORT | 0xbe CONSTANT VDP_DATAPORT | ||||
32 CONSTANT VDP_COLS | 32 CONSTANT VDP_COLS | ||||
24 CONSTANT VDP_ROWS | 24 CONSTANT VDP_ROWS | ||||
SYSVARS 0x72 + CONSTANT PS2_MEM | |||||
SYSVARS 0x72 + CONSTANT CPORT_MEM | |||||
0x3f CONSTANT CPORT_CTL | 0x3f CONSTANT CPORT_CTL | ||||
0xdc CONSTANT CPORT_D1 | 0xdc CONSTANT CPORT_D1 | ||||
0xdd CONSTANT CPORT_D2 | 0xdd CONSTANT CPORT_D2 | ||||
SYSVARS 0x73 + CONSTANT PS2_MEM | |||||
5 LOAD ( z80 assembler ) | 5 LOAD ( z80 assembler ) | ||||
: ZFILL, ( u ) 0 DO 0 A, LOOP ; | : ZFILL, ( u ) 0 DO 0 A, LOOP ; | ||||
262 LOAD ( xcomp ) | 262 LOAD ( xcomp ) | ||||
@@ -11,10 +11,11 @@ SYSVARS 0x70 + CONSTANT VDP_MEM | |||||
0xbe CONSTANT VDP_DATAPORT | 0xbe CONSTANT VDP_DATAPORT | ||||
32 CONSTANT VDP_COLS | 32 CONSTANT VDP_COLS | ||||
24 CONSTANT VDP_ROWS | 24 CONSTANT VDP_ROWS | ||||
SYSVARS 0x72 + CONSTANT PS2_MEM | |||||
SYSVARS 0x72 + CONSTANT CPORT_MEM | |||||
0x3f CONSTANT CPORT_CTL | 0x3f CONSTANT CPORT_CTL | ||||
0xdc CONSTANT CPORT_D1 | 0xdc CONSTANT CPORT_D1 | ||||
0xdd CONSTANT CPORT_D2 | 0xdd CONSTANT CPORT_D2 | ||||
SYSVARS 0x73 + CONSTANT PS2_MEM | |||||
5 LOAD ( z80 assembler ) | 5 LOAD ( z80 assembler ) | ||||
: ZFILL, ( u ) 0 DO 0 A, LOOP ; | : ZFILL, ( u ) 0 DO 0 A, LOOP ; | ||||
262 LOAD ( xcomp ) | 262 LOAD ( xcomp ) | ||||
@@ -76,11 +76,6 @@ static uint8_t iord_kbd() | |||||
return kbd_rd(&kbd); | return kbd_rd(&kbd); | ||||
} | } | ||||
static uint8_t iord_ports_ctl() | |||||
{ | |||||
return ports_ctl_rd(&ports); | |||||
} | |||||
static void iowr_vdp_cmd(uint8_t val) | static void iowr_vdp_cmd(uint8_t val) | ||||
{ | { | ||||
vdp_cmd_wr(&vdp, val); | vdp_cmd_wr(&vdp, val); | ||||
@@ -362,7 +357,7 @@ int main(int argc, char *argv[]) | |||||
m->iord[VDP_DATA_PORT] = iord_vdp_data; | m->iord[VDP_DATA_PORT] = iord_vdp_data; | ||||
m->iord[PORTS_IO1_PORT] = iord_ports_io1; | m->iord[PORTS_IO1_PORT] = iord_ports_io1; | ||||
m->iord[PORTS_IO2_PORT] = iord_ports_io2; | m->iord[PORTS_IO2_PORT] = iord_ports_io2; | ||||
m->iord[PORTS_CTL_PORT] = iord_ports_ctl; | |||||
m->iord[PORTS_CTL_PORT] = iord_noop; | |||||
m->iowr[VDP_CMD_PORT] = iowr_vdp_cmd; | m->iowr[VDP_CMD_PORT] = iowr_vdp_cmd; | ||||
m->iowr[VDP_DATA_PORT] = iowr_vdp_data; | m->iowr[VDP_DATA_PORT] = iowr_vdp_data; | ||||
m->iowr[PORTS_CTL_PORT] = iowr_ports_ctl; | m->iowr[PORTS_CTL_PORT] = iowr_ports_ctl; | ||||
@@ -9,11 +9,6 @@ void ports_init(Ports *ports) | |||||
ports->THB = TRI_HIGHZ; | ports->THB = TRI_HIGHZ; | ||||
} | } | ||||
uint8_t ports_ctl_rd(Ports *ports) | |||||
{ | |||||
return ports->ctl; | |||||
} | |||||
void ports_ctl_wr(Ports *ports, uint8_t val) | void ports_ctl_wr(Ports *ports, uint8_t val) | ||||
{ | { | ||||
ports->ctl = val; | ports->ctl = val; | ||||
@@ -15,7 +15,6 @@ typedef struct { | |||||
} Ports; | } Ports; | ||||
void ports_init(Ports *ports); | void ports_init(Ports *ports); | ||||
uint8_t ports_ctl_rd(Ports *ports); | |||||
void ports_ctl_wr(Ports *ports, uint8_t val); | void ports_ctl_wr(Ports *ports, uint8_t val); | ||||
uint8_t ports_A_rd(Ports *ports); | uint8_t ports_A_rd(Ports *ports); | ||||
uint8_t ports_B_rd(Ports *ports); | uint8_t ports_B_rd(Ports *ports); |