It's more descriptive this way. Also, I'll soon add a new HERESTART config.master
@@ -2,15 +2,15 @@ System variables | |||||
There are some core variables in the core system that are | There are some core variables in the core system that are | ||||
referred to directly by their address in memory throughout the | referred to directly by their address in memory throughout the | ||||
code. The place where they live is configurable by the RAMSTART | |||||
constant in conf.fs, but their relative offset is not. In fact, | |||||
they're mostly referred to directly as their numerical offset | |||||
along with a comment indicating what this offset refers to. | |||||
code. The place where they live is configurable by the SYSVARS | |||||
constant in xcomp unit, but their relative offset is not. In | |||||
fact, they're mostly referred to directly as their numerical | |||||
offset along with a comment indicating what this offset refers | |||||
to. | |||||
This system is a bit fragile because every time we change those | This system is a bit fragile because every time we change those | ||||
offsets, we have to be careful to adjust all system variables | offsets, we have to be careful to adjust all system variables | ||||
offsets, but thankfully, there aren't many system variables. | offsets, but thankfully, there aren't many system variables. | ||||
Here's a list of them: | Here's a list of them: | ||||
(cont.) | (cont.) |
@@ -1,4 +1,4 @@ | |||||
RAMSTART FUTURE USES +3c BLK(* | |||||
SYSVARS FUTURE USES +3c BLK(* | |||||
+02 CURRENT +3e A@* | +02 CURRENT +3e A@* | ||||
+04 HERE +40 A!* | +04 HERE +40 A!* | ||||
+06 C<? +42 FUTURE USES | +06 C<? +42 FUTURE USES | ||||
@@ -6,8 +6,8 @@ RAMSTART FUTURE USES +3c BLK(* | |||||
+0a NLPTR +53 (emit) override | +0a NLPTR +53 (emit) override | ||||
+0c C<* +55 (key) override | +0c C<* +55 (key) override | ||||
+0e WORDBUF +57 FUTURE USES | +0e WORDBUF +57 FUTURE USES | ||||
+2e BOOT C< PTR | |||||
+30 IN> | |||||
+2e BOOT C< PTR | |||||
+30 IN> | |||||
+32 IN(* +70 DRIVERS | +32 IN(* +70 DRIVERS | ||||
+34 BLK@* +80 RAMEND | +34 BLK@* +80 RAMEND | ||||
+36 BLK!* | +36 BLK!* | ||||
@@ -4,7 +4,7 @@ On boot, we jump to the "main" routine in B289 which does | |||||
very few things. | very few things. | ||||
1. Set SP to PS_ADDR and IX to RS_ADDR | 1. Set SP to PS_ADDR and IX to RS_ADDR | ||||
2. Sets HERE to RAMEND (RAMSTART+0x80). | |||||
2. Sets HERE to SYSVARS+0x80. | |||||
3. Sets CURRENT to value of LATEST field in stable ABI. | 3. Sets CURRENT to value of LATEST field in stable ABI. | ||||
4. Execute the word referred to by 0x04 (BOOT) in stable ABI. | 4. Execute the word referred to by 0x04 (BOOT) in stable ABI. | ||||
@@ -4,8 +4,8 @@ This assembles the boot binary. It requires the Z80 assembler | |||||
(B200) and cross compilation setup (B260). It also requires | (B200) and cross compilation setup (B260). It also requires | ||||
these constants to be set: | these constants to be set: | ||||
RAMSTART: beginning address of RAM. This is where system | |||||
variables are placed. HERE is then placed at RAM+80 (ref B80). | |||||
SYSVARS: This is where system variables are placed. HERE is | |||||
then placed at SYSVARS+0x80 (ref B80). | |||||
RS_ADDR: to be set to the bottom address of the Return Stack. | RS_ADDR: to be set to the bottom address of the Return Stack. | ||||
@@ -2,12 +2,12 @@ PC ORG @ 1 + ! ( main ) | |||||
( STACK OVERFLOW PROTECTION: See B76 ) | ( STACK OVERFLOW PROTECTION: See B76 ) | ||||
SP PS_ADDR LDdn, IX RS_ADDR LDdn, | SP PS_ADDR LDdn, IX RS_ADDR LDdn, | ||||
( HERE begins at RAMEND ) | ( HERE begins at RAMEND ) | ||||
HL RAMSTART 0x80 + LDdn, | |||||
RAMSTART 0x04 + LD(n)HL, ( RAM+04 == HERE ) | |||||
HL SYSVARS 0x80 + LDdn, | |||||
SYSVARS 0x04 + LD(n)HL, ( RAM+04 == HERE ) | |||||
( LATEST is a label to the latest entry of the dict. It is | ( LATEST is a label to the latest entry of the dict. It is | ||||
written at offset 0x08 by the process or person building | written at offset 0x08 by the process or person building | ||||
Forth. ) | Forth. ) | ||||
BIN( @ 0x08 + LDHL(n), | BIN( @ 0x08 + LDHL(n), | ||||
RAMSTART 0x02 ( CURRENT ) + LD(n)HL, | |||||
SYSVARS 0x02 ( CURRENT ) + LD(n)HL, | |||||
DE BIN( @ 0x04 ( BOOT ) + LDdd(n), | DE BIN( @ 0x04 ( BOOT ) + LDdd(n), | ||||
JR, L1 FWR ( execute, B301 ) | JR, L1 FWR ( execute, B301 ) |
@@ -1,4 +1,4 @@ | |||||
: RAM+ [ RAMSTART LITN ] + ; : BIN+ [ BIN( @ LITN ] + ; | |||||
: RAM+ [ SYSVARS LITN ] + ; : BIN+ [ BIN( @ LITN ] + ; | |||||
: HERE 0x04 RAM+ ; | : HERE 0x04 RAM+ ; | ||||
: CURRENT* 0x51 RAM+ ; : CURRENT CURRENT* @ ; | : CURRENT* 0x51 RAM+ ; : CURRENT CURRENT* @ ; | ||||
: H@ HERE @ ; | : H@ HERE @ ; | ||||
@@ -1,5 +1,5 @@ | |||||
anatomy. First, we have constants. Some of them are device- | anatomy. First, we have constants. Some of them are device- | ||||
specific, but some of them are always there. RAMSTART is the | |||||
specific, but some of them are always there. SYSVARS is the | |||||
address at which the RAM starts on the system. System variables | address at which the RAM starts on the system. System variables | ||||
will go there and HERE will go after it. | will go there and HERE will go after it. | ||||
@@ -2,7 +2,7 @@ | |||||
0x81 CONSTANT ACIA_IO ( IO port for ACIA's data registers ) | 0x81 CONSTANT ACIA_IO ( IO port for ACIA's data registers ) | ||||
( Address in memory that can be used variables shared | ( Address in memory that can be used variables shared | ||||
with ACIA's native words. 8 bytes used. ) | with ACIA's native words. 8 bytes used. ) | ||||
CREATE ACIA_MEM RAMSTART 0x70 + , | |||||
CREATE ACIA_MEM SYSVARS 0x70 + , | |||||
( Points to ACIA buf ) | ( Points to ACIA buf ) | ||||
: ACIA( ACIA_MEM @ 4 + ; | : ACIA( ACIA_MEM @ 4 + ; | ||||
( Points to ACIA buf end ) | ( Points to ACIA buf end ) | ||||
@@ -1,4 +1,4 @@ | |||||
0x8000 CONSTANT RAMSTART | |||||
0x8000 CONSTANT SYSVARS | |||||
0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR | 0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR | ||||
4 CONSTANT SDC_SPI | 4 CONSTANT SDC_SPI | ||||
5 CONSTANT SDC_CSLOW 6 CONSTANT SDC_CSHIGH | 5 CONSTANT SDC_CSLOW 6 CONSTANT SDC_CSHIGH | ||||
@@ -3,7 +3,7 @@ PC 3 - ORG @ 1+ ! ( main ) | |||||
SP PS_ADDR MOVxI, BP RS_ADDR MOVxI, | SP PS_ADDR MOVxI, BP RS_ADDR MOVxI, | ||||
DI 0x08 MOVxm, ( LATEST ) | DI 0x08 MOVxm, ( LATEST ) | ||||
( HERE begins at CURRENT ) | ( HERE begins at CURRENT ) | ||||
RAMSTART 0x4 ( HERE ) + DI MOVmx, | |||||
RAMSTART 0x2 ( CURRENT ) + DI MOVmx, | |||||
SYSVARS 0x4 ( HERE ) + DI MOVmx, | |||||
SYSVARS 0x2 ( CURRENT ) + DI MOVmx, | |||||
DI 0x04 ( BOOT ) MOVxm, | DI 0x04 ( BOOT ) MOVxm, | ||||
JMPn, lblexec @ RPCn, ( execute ) | JMPn, lblexec @ RPCn, ( execute ) |
@@ -1,6 +1,6 @@ | |||||
0xff00 CONSTANT RS_ADDR | 0xff00 CONSTANT RS_ADDR | ||||
0xfffa CONSTANT PS_ADDR | 0xfffa CONSTANT PS_ADDR | ||||
RS_ADDR 0x80 - CONSTANT RAMSTART | |||||
RS_ADDR 0x80 - CONSTANT SYSVARS | |||||
750 LOAD ( 8086 asm ) | 750 LOAD ( 8086 asm ) | ||||
262 LOAD ( xcomp ) 270 LOAD ( xcomp overrides ) | 262 LOAD ( xcomp ) 270 LOAD ( xcomp overrides ) | ||||
805 820 LOADR | 805 820 LOADR | ||||
@@ -1,4 +1,4 @@ | |||||
0xe800 CONSTANT RAMSTART | |||||
0xe800 CONSTANT SYSVARS | |||||
0xff00 CONSTANT RS_ADDR | 0xff00 CONSTANT RS_ADDR | ||||
0xfffa CONSTANT PS_ADDR | 0xfffa CONSTANT PS_ADDR | ||||
: CODE ( natidx -- ) (entry) 0 C, C, ; | : CODE ( natidx -- ) (entry) 0 C, C, ; | ||||
@@ -1,4 +1,4 @@ | |||||
0xe800 CONSTANT RAMSTART | |||||
0xe800 CONSTANT SYSVARS | |||||
0xff00 CONSTANT RS_ADDR | 0xff00 CONSTANT RS_ADDR | ||||
0xfffa CONSTANT PS_ADDR | 0xfffa CONSTANT PS_ADDR | ||||
212 LOAD ( z80 assembler ) | 212 LOAD ( z80 assembler ) | ||||
@@ -68,7 +68,7 @@ First, we need a `(ps2kc)` routine. In this case, it's easy, it's | |||||
`: (ps2kc) 8 PC@ ;`. Add this after ACIA loading. Then, we can load PS/2 | `: (ps2kc) 8 PC@ ;`. Add this after ACIA loading. Then, we can load PS/2 | ||||
subsystem. You add `411 414 LOADR`. Then, at initialization, you add `PS2$` | subsystem. You add `411 414 LOADR`. Then, at initialization, you add `PS2$` | ||||
after `ACIA$`. You also need to define `PS2_MEM` at the top. You can probably | after `ACIA$`. You also need to define `PS2_MEM` at the top. You can probably | ||||
use `RAMSTART + 0x7a`. | |||||
use `SYSVARS + 0x7a`. | |||||
Rebuild, reflash, should work. For debugging purposes, you might not want to | Rebuild, reflash, should work. For debugging purposes, you might not want to | ||||
go straight to plugging PS/2 `(key)` into the system. What I did myself was | go straight to plugging PS/2 `(key)` into the system. What I did myself was | ||||
@@ -104,7 +104,7 @@ to TH (and also the A/B on the '157). Q is hooked to PB0 and TL. | |||||
We start with the base recipe and add a few things: | We start with the base recipe and add a few things: | ||||
1. at the top: `RAMSTART 0x72 + CONSTANT PS2_MEM` | |||||
1. at the top: `SYSVARS 0x72 + CONSTANT PS2_MEM` | |||||
2. After VDP load: `641 LOAD : (ps2kc) (ps2kcB) ;` (that binds us to port B) | 2. After VDP load: `641 LOAD : (ps2kc) (ps2kcB) ;` (that binds us to port B) | ||||
3. Right after: `411 414 LOADR` (that gives us `(key)`) | 3. Right after: `411 414 LOADR` (that gives us `(key)`) | ||||
4. After `VDP$`: `PS2$`. | 4. After `VDP$`: `PS2$`. | ||||
@@ -1,14 +1,14 @@ | |||||
( 8K of onboard RAM ) | ( 8K of onboard RAM ) | ||||
0xc000 CONSTANT RAMSTART | |||||
0xc000 CONSTANT SYSVARS | |||||
0xdd00 CONSTANT RS_ADDR | 0xdd00 CONSTANT RS_ADDR | ||||
( Memory register at the end of RAM. Must not overwrite ) | ( Memory register at the end of RAM. Must not overwrite ) | ||||
0xddca CONSTANT PS_ADDR | 0xddca CONSTANT PS_ADDR | ||||
RAMSTART 0x70 + CONSTANT VDP_MEM | |||||
SYSVARS 0x70 + CONSTANT VDP_MEM | |||||
0xbf CONSTANT VDP_CTLPORT | 0xbf CONSTANT VDP_CTLPORT | ||||
0xbe CONSTANT VDP_DATAPORT | 0xbe CONSTANT VDP_DATAPORT | ||||
32 CONSTANT VDP_COLS | 32 CONSTANT VDP_COLS | ||||
24 CONSTANT VDP_ROWS | 24 CONSTANT VDP_ROWS | ||||
RAMSTART 0x72 + CONSTANT PAD_MEM | |||||
SYSVARS 0x72 + CONSTANT PAD_MEM | |||||
0x3f CONSTANT PAD_CTLPORT | 0x3f CONSTANT PAD_CTLPORT | ||||
0xdc CONSTANT PAD_D1PORT | 0xdc CONSTANT PAD_D1PORT | ||||
212 LOAD ( z80 assembler ) | 212 LOAD ( z80 assembler ) | ||||
@@ -1,8 +1,8 @@ | |||||
0x8000 CONSTANT RAMSTART | |||||
0x8000 CONSTANT SYSVARS | |||||
0xbf00 CONSTANT RS_ADDR | 0xbf00 CONSTANT RS_ADDR | ||||
0xbffa CONSTANT PS_ADDR | 0xbffa CONSTANT PS_ADDR | ||||
RAMSTART 0x70 + CONSTANT LCD_MEM | |||||
RAMSTART 0x72 + CONSTANT KBD_MEM | |||||
SYSVARS 0x70 + CONSTANT LCD_MEM | |||||
SYSVARS 0x72 + CONSTANT KBD_MEM | |||||
0x01 CONSTANT KBD_PORT | 0x01 CONSTANT KBD_PORT | ||||
212 LOAD ( z80 assembler ) | 212 LOAD ( z80 assembler ) | ||||
: ZFILL, ( u ) 0 DO 0 A, LOOP ; | : ZFILL, ( u ) 0 DO 0 A, LOOP ; | ||||
@@ -1,6 +1,6 @@ | |||||
0xff00 CONSTANT RS_ADDR | 0xff00 CONSTANT RS_ADDR | ||||
0xfffa CONSTANT PS_ADDR | 0xfffa CONSTANT PS_ADDR | ||||
RS_ADDR 0x80 - CONSTANT RAMSTART | |||||
RS_ADDR 0x80 - CONSTANT SYSVARS | |||||
212 LOAD ( z80 assembler ) | 212 LOAD ( z80 assembler ) | ||||
262 LOAD ( xcomp ) | 262 LOAD ( xcomp ) | ||||
282 LOAD ( boot.z80.decl ) | 282 LOAD ( boot.z80.decl ) | ||||
@@ -1,5 +1,5 @@ | |||||
0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR | 0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR | ||||
RS_ADDR 0x80 - CONSTANT RAMSTART | |||||
RS_ADDR 0x80 - CONSTANT SYSVARS | |||||
212 LOAD ( z80 assembler ) | 212 LOAD ( z80 assembler ) | ||||
262 LOAD ( xcomp ) | 262 LOAD ( xcomp ) | ||||
282 LOAD ( boot.z80.decl ) | 282 LOAD ( boot.z80.decl ) | ||||