diff --git a/.gitmodules b/.gitmodules deleted file mode 100644 index 7b7d24f..0000000 --- a/.gitmodules +++ /dev/null @@ -1,3 +0,0 @@ -[submodule "emul/libz80"] - path = emul/libz80 - url = https://github.com/ggambetta/libz80.git diff --git a/emul/Makefile b/emul/Makefile index 7e38b48..b2875ac 100644 --- a/emul/Makefile +++ b/emul/Makefile @@ -1,5 +1,5 @@ TARGETS = forth -OBJS = emul.o libz80/libz80.o +OBJS = emul.o z80.o CDIR = ../cvm STAGE = $(CDIR)/stage BLKFS = $(CDIR)/blkfs @@ -10,10 +10,6 @@ all: $(TARGETS) forth: forth.c $(OBJS) $(BLKFS) $(CC) forth.c $(OBJS) -lncurses -o $@ -libz80/libz80.o: libz80/z80.c - $(MAKE) -C libz80/codegen opcodes - $(CC) -Wall -std=c89 -g -c -o libz80/libz80.o libz80/z80.c - emul.o: emul.c forth.bin $(BLKFS) $(CC) -DFBIN_PATH=\"`pwd`/forth.bin\" -DBLKFS_PATH=\"`pwd`/$(BLKFS)\" -c -o emul.o emul.c @@ -27,4 +23,4 @@ $(STAGE): .PHONY: clean clean: - rm -f $(TARGETS) emul.o *.bin libz80/libz80.o + rm -f $(TARGETS) emul.o *.bin z80.o diff --git a/emul/README.md b/emul/README.md index 7e0d0dc..f76c155 100644 --- a/emul/README.md +++ b/emul/README.md @@ -10,10 +10,7 @@ it's `libncurses5-dev`. ## Build -First, make sure that the `libz80` git submodule is checked out. If not, run -`git submodule init && git submodule update`. - -After that, you can run `make` and it builds the `forth` interpreter. +Run `make` and it builds the `forth` interpreter. ## Usage diff --git a/emul/emul.h b/emul/emul.h index f79bc53..9941833 100644 --- a/emul/emul.h +++ b/emul/emul.h @@ -1,7 +1,7 @@ #pragma once #include #include -#include "libz80/z80.h" +#include "z80.h" typedef byte (*IORD) (); typedef void (*IOWR) (byte data); diff --git a/emul/libz80 b/emul/libz80 deleted file mode 160000 index 55520ab..0000000 --- a/emul/libz80 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 55520abc1c69978aad3ff65493dbea00ff940d8b diff --git a/emul/opcodes_decl.h b/emul/opcodes_decl.h new file mode 100644 index 0000000..eeabe45 --- /dev/null +++ b/emul/opcodes_decl.h @@ -0,0 +1,1137 @@ +// Generated by libz80 +static void ADC_A_off_HL (Z80Context* ctx); +static void ADC_A_off_IX_d (Z80Context* ctx); +static void ADC_A_off_IY_d (Z80Context* ctx); +static void ADC_A_A (Z80Context* ctx); +static void ADC_A_B (Z80Context* ctx); +static void ADC_A_C (Z80Context* ctx); +static void ADC_A_D (Z80Context* ctx); +static void ADC_A_E (Z80Context* ctx); +static void ADC_A_H (Z80Context* ctx); +static void ADC_A_IXh (Z80Context* ctx); +static void ADC_A_IXl (Z80Context* ctx); +static void ADC_A_IYh (Z80Context* ctx); +static void ADC_A_IYl (Z80Context* ctx); +static void ADC_A_L (Z80Context* ctx); +static void ADC_A_n (Z80Context* ctx); +static void ADC_HL_BC (Z80Context* ctx); +static void ADC_HL_DE (Z80Context* ctx); +static void ADC_HL_HL (Z80Context* ctx); +static void ADC_HL_SP (Z80Context* ctx); +static void ADD_A_off_HL (Z80Context* ctx); +static void ADD_A_off_IX_d (Z80Context* ctx); +static void ADD_A_off_IY_d (Z80Context* ctx); +static void ADD_A_A (Z80Context* ctx); +static void ADD_A_B (Z80Context* ctx); +static void ADD_A_C (Z80Context* ctx); +static void ADD_A_D (Z80Context* ctx); +static void ADD_A_E (Z80Context* ctx); +static void ADD_A_H (Z80Context* ctx); +static void ADD_A_IXh (Z80Context* ctx); +static void ADD_A_IXl (Z80Context* ctx); +static void ADD_A_IYh (Z80Context* ctx); +static void ADD_A_IYl (Z80Context* ctx); +static void ADD_A_L (Z80Context* ctx); +static void ADD_A_n (Z80Context* ctx); +static void ADD_HL_BC (Z80Context* ctx); +static void ADD_HL_DE (Z80Context* ctx); +static void ADD_HL_HL (Z80Context* ctx); +static void ADD_HL_SP (Z80Context* ctx); +static void ADD_IX_BC (Z80Context* ctx); +static void ADD_IX_DE (Z80Context* ctx); +static void ADD_IX_IX (Z80Context* ctx); +static void ADD_IX_SP (Z80Context* ctx); +static void ADD_IY_BC (Z80Context* ctx); +static void ADD_IY_DE (Z80Context* ctx); +static void ADD_IY_IY (Z80Context* ctx); +static void ADD_IY_SP (Z80Context* ctx); +static void AND_off_HL (Z80Context* ctx); +static void AND_off_IX_d (Z80Context* ctx); +static void AND_off_IY_d (Z80Context* ctx); +static void AND_A (Z80Context* ctx); +static void AND_B (Z80Context* ctx); +static void AND_C (Z80Context* ctx); +static void AND_D (Z80Context* ctx); +static void AND_E (Z80Context* ctx); +static void AND_H (Z80Context* ctx); +static void AND_IXh (Z80Context* ctx); +static void AND_IXl (Z80Context* ctx); +static void AND_IYh (Z80Context* ctx); +static void AND_IYl (Z80Context* ctx); +static void AND_L (Z80Context* ctx); +static void AND_n (Z80Context* ctx); +static void BIT_0_off_HL (Z80Context* ctx); +static void BIT_0_off_IX_d (Z80Context* ctx); +static void BIT_0_off_IY_d (Z80Context* ctx); +static void BIT_0_A (Z80Context* ctx); +static void BIT_0_B (Z80Context* ctx); +static void BIT_0_C (Z80Context* ctx); +static void BIT_0_D (Z80Context* ctx); +static void BIT_0_E (Z80Context* ctx); +static void BIT_0_H (Z80Context* ctx); +static void BIT_0_L (Z80Context* ctx); +static void BIT_1_off_HL (Z80Context* ctx); +static void BIT_1_off_IX_d (Z80Context* ctx); +static void BIT_1_off_IY_d (Z80Context* ctx); +static void BIT_1_A (Z80Context* ctx); +static void BIT_1_B (Z80Context* ctx); +static void BIT_1_C (Z80Context* ctx); +static void BIT_1_D (Z80Context* ctx); +static void BIT_1_E (Z80Context* ctx); +static void BIT_1_H (Z80Context* ctx); +static void BIT_1_L (Z80Context* ctx); +static void BIT_2_off_HL (Z80Context* ctx); +static void BIT_2_off_IX_d (Z80Context* ctx); +static void BIT_2_off_IY_d (Z80Context* ctx); +static void BIT_2_A (Z80Context* ctx); +static void BIT_2_B (Z80Context* ctx); +static void BIT_2_C (Z80Context* ctx); +static void BIT_2_D (Z80Context* ctx); +static void BIT_2_E (Z80Context* ctx); +static void BIT_2_H (Z80Context* ctx); +static void BIT_2_L (Z80Context* ctx); +static void BIT_3_off_HL (Z80Context* ctx); +static void BIT_3_off_IX_d (Z80Context* ctx); +static void BIT_3_off_IY_d (Z80Context* ctx); +static void BIT_3_A (Z80Context* ctx); +static void BIT_3_B (Z80Context* ctx); +static void BIT_3_C (Z80Context* ctx); +static void BIT_3_D (Z80Context* ctx); +static void BIT_3_E (Z80Context* ctx); +static void BIT_3_H (Z80Context* ctx); +static void BIT_3_L (Z80Context* ctx); +static void BIT_4_off_HL (Z80Context* ctx); +static void BIT_4_off_IX_d (Z80Context* ctx); +static void BIT_4_off_IY_d (Z80Context* ctx); +static void BIT_4_A (Z80Context* ctx); +static void BIT_4_B (Z80Context* ctx); +static void BIT_4_C (Z80Context* ctx); +static void BIT_4_D (Z80Context* ctx); +static void BIT_4_E (Z80Context* ctx); +static void BIT_4_H (Z80Context* ctx); +static void BIT_4_L (Z80Context* ctx); +static void BIT_5_off_HL (Z80Context* ctx); +static void BIT_5_off_IX_d (Z80Context* ctx); +static void BIT_5_off_IY_d (Z80Context* ctx); +static void BIT_5_A (Z80Context* ctx); +static void BIT_5_B (Z80Context* ctx); +static void BIT_5_C (Z80Context* ctx); +static void BIT_5_D (Z80Context* ctx); +static void BIT_5_E (Z80Context* ctx); +static void BIT_5_H (Z80Context* ctx); +static void BIT_5_L (Z80Context* ctx); +static void BIT_6_off_HL (Z80Context* ctx); +static void BIT_6_off_IX_d (Z80Context* ctx); +static void BIT_6_off_IY_d (Z80Context* ctx); +static void BIT_6_A (Z80Context* ctx); +static void BIT_6_B (Z80Context* ctx); +static void BIT_6_C (Z80Context* ctx); +static void BIT_6_D (Z80Context* ctx); +static void BIT_6_E (Z80Context* ctx); +static void BIT_6_H (Z80Context* ctx); +static void BIT_6_L (Z80Context* ctx); +static void BIT_7_off_HL (Z80Context* ctx); +static void BIT_7_off_IX_d (Z80Context* ctx); +static void BIT_7_off_IY_d (Z80Context* ctx); +static void BIT_7_A (Z80Context* ctx); +static void BIT_7_B (Z80Context* ctx); +static void BIT_7_C (Z80Context* ctx); +static void BIT_7_D (Z80Context* ctx); +static void BIT_7_E (Z80Context* ctx); +static void BIT_7_H (Z80Context* ctx); +static void BIT_7_L (Z80Context* ctx); +static void CALL_off_nn (Z80Context* ctx); +static void CALL_C_off_nn (Z80Context* ctx); +static void CALL_M_off_nn (Z80Context* ctx); +static void CALL_NC_off_nn (Z80Context* ctx); +static void CALL_NZ_off_nn (Z80Context* ctx); +static void CALL_P_off_nn (Z80Context* ctx); +static void CALL_PE_off_nn (Z80Context* ctx); +static void CALL_PO_off_nn (Z80Context* ctx); +static void CALL_Z_off_nn (Z80Context* ctx); +static void CCF (Z80Context* ctx); +static void CP_off_HL (Z80Context* ctx); +static void CP_off_IX_d (Z80Context* ctx); +static void CP_off_IY_d (Z80Context* ctx); +static void CP_A (Z80Context* ctx); +static void CP_B (Z80Context* ctx); +static void CP_C (Z80Context* ctx); +static void CP_D (Z80Context* ctx); +static void CP_E (Z80Context* ctx); +static void CP_H (Z80Context* ctx); +static void CP_IXh (Z80Context* ctx); +static void CP_IXl (Z80Context* ctx); +static void CP_IYh (Z80Context* ctx); +static void CP_IYl (Z80Context* ctx); +static void CP_L (Z80Context* ctx); +static void CP_n (Z80Context* ctx); +static void CPD (Z80Context* ctx); +static void CPDR (Z80Context* ctx); +static void CPI (Z80Context* ctx); +static void CPIR (Z80Context* ctx); +static void CPL (Z80Context* ctx); +static void DAA (Z80Context* ctx); +static void DEC_off_HL (Z80Context* ctx); +static void DEC_off_IX_d (Z80Context* ctx); +static void DEC_off_IY_d (Z80Context* ctx); +static void DEC_A (Z80Context* ctx); +static void DEC_B (Z80Context* ctx); +static void DEC_BC (Z80Context* ctx); +static void DEC_C (Z80Context* ctx); +static void DEC_D (Z80Context* ctx); +static void DEC_DE (Z80Context* ctx); +static void DEC_E (Z80Context* ctx); +static void DEC_H (Z80Context* ctx); +static void DEC_HL (Z80Context* ctx); +static void DEC_IX (Z80Context* ctx); +static void DEC_IXh (Z80Context* ctx); +static void DEC_IXl (Z80Context* ctx); +static void DEC_IY (Z80Context* ctx); +static void DEC_IYh (Z80Context* ctx); +static void DEC_IYl (Z80Context* ctx); +static void DEC_L (Z80Context* ctx); +static void DEC_SP (Z80Context* ctx); +static void DI (Z80Context* ctx); +static void DJNZ_off_PC_e (Z80Context* ctx); +static void EI (Z80Context* ctx); +static void EX_off_SP_HL (Z80Context* ctx); +static void EX_off_SP_IX (Z80Context* ctx); +static void EX_off_SP_IY (Z80Context* ctx); +static void EX_AF_AF_ (Z80Context* ctx); +static void EX_DE_HL (Z80Context* ctx); +static void EXX (Z80Context* ctx); +static void HALT (Z80Context* ctx); +static void IM_0 (Z80Context* ctx); +static void IM_1 (Z80Context* ctx); +static void IM_2 (Z80Context* ctx); +static void IN_A_off_C (Z80Context* ctx); +static void IN_A_off_n (Z80Context* ctx); +static void IN_B_off_C (Z80Context* ctx); +static void IN_C_off_C (Z80Context* ctx); +static void IN_D_off_C (Z80Context* ctx); +static void IN_E_off_C (Z80Context* ctx); +static void IN_F_off_C (Z80Context* ctx); +static void IN_H_off_C (Z80Context* ctx); +static void IN_L_off_C (Z80Context* ctx); +static void INC_off_HL (Z80Context* ctx); +static void INC_off_IX_d (Z80Context* ctx); +static void INC_off_IY_d (Z80Context* ctx); +static void INC_A (Z80Context* ctx); +static void INC_B (Z80Context* ctx); +static void INC_BC (Z80Context* ctx); +static void INC_C (Z80Context* ctx); +static void INC_D (Z80Context* ctx); +static void INC_DE (Z80Context* ctx); +static void INC_E (Z80Context* ctx); +static void INC_H (Z80Context* ctx); +static void INC_HL (Z80Context* ctx); +static void INC_IX (Z80Context* ctx); +static void INC_IXh (Z80Context* ctx); +static void INC_IXl (Z80Context* ctx); +static void INC_IY (Z80Context* ctx); +static void INC_IYh (Z80Context* ctx); +static void INC_IYl (Z80Context* ctx); +static void INC_L (Z80Context* ctx); +static void INC_SP (Z80Context* ctx); +static void IND (Z80Context* ctx); +static void INDR (Z80Context* ctx); +static void INI (Z80Context* ctx); +static void INIR (Z80Context* ctx); +static void JP_off_HL (Z80Context* ctx); +static void JP_off_IX (Z80Context* ctx); +static void JP_off_IY (Z80Context* ctx); +static void JP_off_nn (Z80Context* ctx); +static void JP_C_off_nn (Z80Context* ctx); +static void JP_M_off_nn (Z80Context* ctx); +static void JP_NC_off_nn (Z80Context* ctx); +static void JP_NZ_off_nn (Z80Context* ctx); +static void JP_P_off_nn (Z80Context* ctx); +static void JP_PE_off_nn (Z80Context* ctx); +static void JP_PO_off_nn (Z80Context* ctx); +static void JP_Z_off_nn (Z80Context* ctx); +static void JR_off_PC_e (Z80Context* ctx); +static void JR_C_off_PC_e (Z80Context* ctx); +static void JR_NC_off_PC_e (Z80Context* ctx); +static void JR_NZ_off_PC_e (Z80Context* ctx); +static void JR_Z_off_PC_e (Z80Context* ctx); +static void LD_off_BC_A (Z80Context* ctx); +static void LD_off_DE_A (Z80Context* ctx); +static void LD_off_HL_A (Z80Context* ctx); +static void LD_off_HL_B (Z80Context* ctx); +static void LD_off_HL_C (Z80Context* ctx); +static void LD_off_HL_D (Z80Context* ctx); +static void LD_off_HL_E (Z80Context* ctx); +static void LD_off_HL_H (Z80Context* ctx); +static void LD_off_HL_L (Z80Context* ctx); +static void LD_off_HL_n (Z80Context* ctx); +static void LD_off_IX_d_A (Z80Context* ctx); +static void LD_off_IX_d_B (Z80Context* ctx); +static void LD_off_IX_d_C (Z80Context* ctx); +static void LD_off_IX_d_D (Z80Context* ctx); +static void LD_off_IX_d_E (Z80Context* ctx); +static void LD_off_IX_d_H (Z80Context* ctx); +static void LD_off_IX_d_L (Z80Context* ctx); +static void LD_off_IX_d_n (Z80Context* ctx); +static void LD_off_IY_d_A (Z80Context* ctx); +static void LD_off_IY_d_B (Z80Context* ctx); +static void LD_off_IY_d_C (Z80Context* ctx); +static void LD_off_IY_d_D (Z80Context* ctx); +static void LD_off_IY_d_E (Z80Context* ctx); +static void LD_off_IY_d_H (Z80Context* ctx); +static void LD_off_IY_d_L (Z80Context* ctx); +static void LD_off_IY_d_n (Z80Context* ctx); +static void LD_off_nn_A (Z80Context* ctx); +static void LD_off_nn_BC (Z80Context* ctx); +static void LD_off_nn_DE (Z80Context* ctx); +static void LD_off_nn_HL (Z80Context* ctx); +static void LD_off_nn_IX (Z80Context* ctx); +static void LD_off_nn_IY (Z80Context* ctx); +static void LD_off_nn_SP (Z80Context* ctx); +static void LD_A_off_BC (Z80Context* ctx); +static void LD_A_off_DE (Z80Context* ctx); +static void LD_A_off_HL (Z80Context* ctx); +static void LD_A_off_IX_d (Z80Context* ctx); +static void LD_A_off_IY_d (Z80Context* ctx); +static void LD_A_off_nn (Z80Context* ctx); +static void LD_A_A (Z80Context* ctx); +static void LD_A_B (Z80Context* ctx); +static void LD_A_C (Z80Context* ctx); +static void LD_A_D (Z80Context* ctx); +static void LD_A_E (Z80Context* ctx); +static void LD_A_H (Z80Context* ctx); +static void LD_A_I (Z80Context* ctx); +static void LD_A_IXh (Z80Context* ctx); +static void LD_A_IXl (Z80Context* ctx); +static void LD_A_IYh (Z80Context* ctx); +static void LD_A_IYl (Z80Context* ctx); +static void LD_A_L (Z80Context* ctx); +static void LD_A_n (Z80Context* ctx); +static void LD_A_R (Z80Context* ctx); +static void LD_A_RES_0_off_IX_d (Z80Context* ctx); +static void LD_A_RES_0_off_IY_d (Z80Context* ctx); +static void LD_A_RES_1_off_IX_d (Z80Context* ctx); +static void LD_A_RES_1_off_IY_d (Z80Context* ctx); +static void LD_A_RES_2_off_IX_d (Z80Context* ctx); +static void LD_A_RES_2_off_IY_d (Z80Context* ctx); +static void LD_A_RES_3_off_IX_d (Z80Context* ctx); +static void LD_A_RES_3_off_IY_d (Z80Context* ctx); +static void LD_A_RES_4_off_IX_d (Z80Context* ctx); +static void LD_A_RES_4_off_IY_d (Z80Context* ctx); +static void LD_A_RES_5_off_IX_d (Z80Context* ctx); +static void LD_A_RES_5_off_IY_d (Z80Context* ctx); +static void LD_A_RES_6_off_IX_d (Z80Context* ctx); +static void LD_A_RES_6_off_IY_d (Z80Context* ctx); +static void LD_A_RES_7_off_IX_d (Z80Context* ctx); +static void LD_A_RES_7_off_IY_d (Z80Context* ctx); +static void LD_A_RL_off_IX_d (Z80Context* ctx); +static void LD_A_RL_off_IY_d (Z80Context* ctx); +static void LD_A_RLC_off_IX_d (Z80Context* ctx); +static void LD_A_RLC_off_IY_d (Z80Context* ctx); +static void LD_A_RR_off_IX_d (Z80Context* ctx); +static void LD_A_RR_off_IY_d (Z80Context* ctx); +static void LD_A_RRC_off_IX_d (Z80Context* ctx); +static void LD_A_RRC_off_IY_d (Z80Context* ctx); +static void LD_A_SET_0_off_IX_d (Z80Context* ctx); +static void LD_A_SET_0_off_IY_d (Z80Context* ctx); +static void LD_A_SET_1_off_IX_d (Z80Context* ctx); +static void LD_A_SET_1_off_IY_d (Z80Context* ctx); +static void LD_A_SET_2_off_IX_d (Z80Context* ctx); +static void LD_A_SET_2_off_IY_d (Z80Context* ctx); +static void LD_A_SET_3_off_IX_d (Z80Context* ctx); +static void LD_A_SET_3_off_IY_d (Z80Context* ctx); +static void LD_A_SET_4_off_IX_d (Z80Context* ctx); +static void LD_A_SET_4_off_IY_d (Z80Context* ctx); +static void LD_A_SET_5_off_IX_d (Z80Context* ctx); +static void LD_A_SET_5_off_IY_d (Z80Context* ctx); +static void LD_A_SET_6_off_IX_d (Z80Context* ctx); +static void LD_A_SET_6_off_IY_d (Z80Context* ctx); +static void LD_A_SET_7_off_IX_d (Z80Context* ctx); +static void LD_A_SET_7_off_IY_d (Z80Context* ctx); +static void LD_A_SLA_off_IX_d (Z80Context* ctx); +static void LD_A_SLA_off_IY_d (Z80Context* ctx); +static void LD_A_SLL_off_IX_d (Z80Context* ctx); +static void LD_A_SLL_off_IY_d (Z80Context* ctx); +static void LD_A_SRA_off_IX_d (Z80Context* ctx); +static void LD_A_SRA_off_IY_d (Z80Context* ctx); +static void LD_A_SRL_off_IX_d (Z80Context* ctx); +static void LD_A_SRL_off_IY_d (Z80Context* ctx); +static void LD_B_off_HL (Z80Context* ctx); +static void LD_B_off_IX_d (Z80Context* ctx); +static void LD_B_off_IY_d (Z80Context* ctx); +static void LD_B_A (Z80Context* ctx); +static void LD_B_B (Z80Context* ctx); +static void LD_B_C (Z80Context* ctx); +static void LD_B_D (Z80Context* ctx); +static void LD_B_E (Z80Context* ctx); +static void LD_B_H (Z80Context* ctx); +static void LD_B_IXh (Z80Context* ctx); +static void LD_B_IXl (Z80Context* ctx); +static void LD_B_IYh (Z80Context* ctx); +static void LD_B_IYl (Z80Context* ctx); +static void LD_B_L (Z80Context* ctx); +static void LD_B_n (Z80Context* ctx); +static void LD_B_RES_0_off_IX_d (Z80Context* ctx); +static void LD_B_RES_0_off_IY_d (Z80Context* ctx); +static void LD_B_RES_1_off_IX_d (Z80Context* ctx); +static void LD_B_RES_1_off_IY_d (Z80Context* ctx); +static void LD_B_RES_2_off_IX_d (Z80Context* ctx); +static void LD_B_RES_2_off_IY_d (Z80Context* ctx); +static void LD_B_RES_3_off_IX_d (Z80Context* ctx); +static void LD_B_RES_3_off_IY_d (Z80Context* ctx); +static void LD_B_RES_4_off_IX_d (Z80Context* ctx); +static void LD_B_RES_4_off_IY_d (Z80Context* ctx); +static void LD_B_RES_5_off_IX_d (Z80Context* ctx); +static void LD_B_RES_5_off_IY_d (Z80Context* ctx); +static void LD_B_RES_6_off_IX_d (Z80Context* ctx); +static void LD_B_RES_6_off_IY_d (Z80Context* ctx); +static void LD_B_RES_7_off_IX_d (Z80Context* ctx); +static void LD_B_RES_7_off_IY_d (Z80Context* ctx); +static void LD_B_RL_off_IX_d (Z80Context* ctx); +static void LD_B_RL_off_IY_d (Z80Context* ctx); +static void LD_B_RLC_off_IX_d (Z80Context* ctx); +static void LD_B_RLC_off_IY_d (Z80Context* ctx); +static void LD_B_RR_off_IX_d (Z80Context* ctx); +static void LD_B_RR_off_IY_d (Z80Context* ctx); +static void LD_B_RRC_off_IX_d (Z80Context* ctx); +static void LD_B_RRC_off_IY_d (Z80Context* ctx); +static void LD_B_SET_0_off_IX_d (Z80Context* ctx); +static void LD_B_SET_0_off_IY_d (Z80Context* ctx); +static void LD_B_SET_1_off_IX_d (Z80Context* ctx); +static void LD_B_SET_1_off_IY_d (Z80Context* ctx); +static void LD_B_SET_2_off_IX_d (Z80Context* ctx); +static void LD_B_SET_2_off_IY_d (Z80Context* ctx); +static void LD_B_SET_3_off_IX_d (Z80Context* ctx); +static void LD_B_SET_3_off_IY_d (Z80Context* ctx); +static void LD_B_SET_4_off_IX_d (Z80Context* ctx); +static void LD_B_SET_4_off_IY_d (Z80Context* ctx); +static void LD_B_SET_5_off_IX_d (Z80Context* ctx); +static void LD_B_SET_5_off_IY_d (Z80Context* ctx); +static void LD_B_SET_6_off_IX_d (Z80Context* ctx); +static void LD_B_SET_6_off_IY_d (Z80Context* ctx); +static void LD_B_SET_7_off_IX_d (Z80Context* ctx); +static void LD_B_SET_7_off_IY_d (Z80Context* ctx); +static void LD_B_SLA_off_IX_d (Z80Context* ctx); +static void LD_B_SLA_off_IY_d (Z80Context* ctx); +static void LD_B_SLL_off_IX_d (Z80Context* ctx); +static void LD_B_SLL_off_IY_d (Z80Context* ctx); +static void LD_B_SRA_off_IX_d (Z80Context* ctx); +static void LD_B_SRA_off_IY_d (Z80Context* ctx); +static void LD_B_SRL_off_IX_d (Z80Context* ctx); +static void LD_B_SRL_off_IY_d (Z80Context* ctx); +static void LD_BC_off_nn (Z80Context* ctx); +static void LD_BC_nn (Z80Context* ctx); +static void LD_C_off_HL (Z80Context* ctx); +static void LD_C_off_IX_d (Z80Context* ctx); +static void LD_C_off_IY_d (Z80Context* ctx); +static void LD_C_A (Z80Context* ctx); +static void LD_C_B (Z80Context* ctx); +static void LD_C_C (Z80Context* ctx); +static void LD_C_D (Z80Context* ctx); +static void LD_C_E (Z80Context* ctx); +static void LD_C_H (Z80Context* ctx); +static void LD_C_IXh (Z80Context* ctx); +static void LD_C_IXl (Z80Context* ctx); +static void LD_C_IYh (Z80Context* ctx); +static void LD_C_IYl (Z80Context* ctx); +static void LD_C_L (Z80Context* ctx); +static void LD_C_n (Z80Context* ctx); +static void LD_C_RES_0_off_IX_d (Z80Context* ctx); +static void LD_C_RES_0_off_IY_d (Z80Context* ctx); +static void LD_C_RES_1_off_IX_d (Z80Context* ctx); +static void LD_C_RES_1_off_IY_d (Z80Context* ctx); +static void LD_C_RES_2_off_IX_d (Z80Context* ctx); +static void LD_C_RES_2_off_IY_d (Z80Context* ctx); +static void LD_C_RES_3_off_IX_d (Z80Context* ctx); +static void LD_C_RES_3_off_IY_d (Z80Context* ctx); +static void LD_C_RES_4_off_IX_d (Z80Context* ctx); +static void LD_C_RES_4_off_IY_d (Z80Context* ctx); +static void LD_C_RES_5_off_IX_d (Z80Context* ctx); +static void LD_C_RES_5_off_IY_d (Z80Context* ctx); +static void LD_C_RES_6_off_IX_d (Z80Context* ctx); +static void LD_C_RES_6_off_IY_d (Z80Context* ctx); +static void LD_C_RES_7_off_IX_d (Z80Context* ctx); +static void LD_C_RES_7_off_IY_d (Z80Context* ctx); +static void LD_C_RL_off_IX_d (Z80Context* ctx); +static void LD_C_RL_off_IY_d (Z80Context* ctx); +static void LD_C_RLC_off_IX_d (Z80Context* ctx); +static void LD_C_RLC_off_IY_d (Z80Context* ctx); +static void LD_C_RR_off_IX_d (Z80Context* ctx); +static void LD_C_RR_off_IY_d (Z80Context* ctx); +static void LD_C_RRC_off_IX_d (Z80Context* ctx); +static void LD_C_RRC_off_IY_d (Z80Context* ctx); +static void LD_C_SET_0_off_IX_d (Z80Context* ctx); +static void LD_C_SET_0_off_IY_d (Z80Context* ctx); +static void LD_C_SET_1_off_IX_d (Z80Context* ctx); +static void LD_C_SET_1_off_IY_d (Z80Context* ctx); +static void LD_C_SET_2_off_IX_d (Z80Context* ctx); +static void LD_C_SET_2_off_IY_d (Z80Context* ctx); +static void LD_C_SET_3_off_IX_d (Z80Context* ctx); +static void LD_C_SET_3_off_IY_d (Z80Context* ctx); +static void LD_C_SET_4_off_IX_d (Z80Context* ctx); +static void LD_C_SET_4_off_IY_d (Z80Context* ctx); +static void LD_C_SET_5_off_IX_d (Z80Context* ctx); +static void LD_C_SET_5_off_IY_d (Z80Context* ctx); +static void LD_C_SET_6_off_IX_d (Z80Context* ctx); +static void LD_C_SET_6_off_IY_d (Z80Context* ctx); +static void LD_C_SET_7_off_IX_d (Z80Context* ctx); +static void LD_C_SET_7_off_IY_d (Z80Context* ctx); +static void LD_C_SLA_off_IX_d (Z80Context* ctx); +static void LD_C_SLA_off_IY_d (Z80Context* ctx); +static void LD_C_SLL_off_IX_d (Z80Context* ctx); +static void LD_C_SLL_off_IY_d (Z80Context* ctx); +static void LD_C_SRA_off_IX_d (Z80Context* ctx); +static void LD_C_SRA_off_IY_d (Z80Context* ctx); +static void LD_C_SRL_off_IX_d (Z80Context* ctx); +static void LD_C_SRL_off_IY_d (Z80Context* ctx); +static void LD_D_off_HL (Z80Context* ctx); +static void LD_D_off_IX_d (Z80Context* ctx); +static void LD_D_off_IY_d (Z80Context* ctx); +static void LD_D_A (Z80Context* ctx); +static void LD_D_B (Z80Context* ctx); +static void LD_D_C (Z80Context* ctx); +static void LD_D_D (Z80Context* ctx); +static void LD_D_E (Z80Context* ctx); +static void LD_D_H (Z80Context* ctx); +static void LD_D_IXh (Z80Context* ctx); +static void LD_D_IXl (Z80Context* ctx); +static void LD_D_IYh (Z80Context* ctx); +static void LD_D_IYl (Z80Context* ctx); +static void LD_D_L (Z80Context* ctx); +static void LD_D_n (Z80Context* ctx); +static void LD_D_RES_0_off_IX_d (Z80Context* ctx); +static void LD_D_RES_0_off_IY_d (Z80Context* ctx); +static void LD_D_RES_1_off_IX_d (Z80Context* ctx); +static void LD_D_RES_1_off_IY_d (Z80Context* ctx); +static void LD_D_RES_2_off_IX_d (Z80Context* ctx); +static void LD_D_RES_2_off_IY_d (Z80Context* ctx); +static void LD_D_RES_3_off_IX_d (Z80Context* ctx); +static void LD_D_RES_3_off_IY_d (Z80Context* ctx); +static void LD_D_RES_4_off_IX_d (Z80Context* ctx); +static void LD_D_RES_4_off_IY_d (Z80Context* ctx); +static void LD_D_RES_5_off_IX_d (Z80Context* ctx); +static void LD_D_RES_5_off_IY_d (Z80Context* ctx); +static void LD_D_RES_6_off_IX_d (Z80Context* ctx); +static void LD_D_RES_6_off_IY_d (Z80Context* ctx); +static void LD_D_RES_7_off_IX_d (Z80Context* ctx); +static void LD_D_RES_7_off_IY_d (Z80Context* ctx); +static void LD_D_RL_off_IX_d (Z80Context* ctx); +static void LD_D_RL_off_IY_d (Z80Context* ctx); +static void LD_D_RLC_off_IX_d (Z80Context* ctx); +static void LD_D_RLC_off_IY_d (Z80Context* ctx); +static void LD_D_RR_off_IX_d (Z80Context* ctx); +static void LD_D_RR_off_IY_d (Z80Context* ctx); +static void LD_D_RRC_off_IX_d (Z80Context* ctx); +static void LD_D_RRC_off_IY_d (Z80Context* ctx); +static void LD_D_SET_0_off_IX_d (Z80Context* ctx); +static void LD_D_SET_0_off_IY_d (Z80Context* ctx); +static void LD_D_SET_1_off_IX_d (Z80Context* ctx); +static void LD_D_SET_1_off_IY_d (Z80Context* ctx); +static void LD_D_SET_2_off_IX_d (Z80Context* ctx); +static void LD_D_SET_2_off_IY_d (Z80Context* ctx); +static void LD_D_SET_3_off_IX_d (Z80Context* ctx); +static void LD_D_SET_3_off_IY_d (Z80Context* ctx); +static void LD_D_SET_4_off_IX_d (Z80Context* ctx); +static void LD_D_SET_4_off_IY_d (Z80Context* ctx); +static void LD_D_SET_5_off_IX_d (Z80Context* ctx); +static void LD_D_SET_5_off_IY_d (Z80Context* ctx); +static void LD_D_SET_6_off_IX_d (Z80Context* ctx); +static void LD_D_SET_6_off_IY_d (Z80Context* ctx); +static void LD_D_SET_7_off_IX_d (Z80Context* ctx); +static void LD_D_SET_7_off_IY_d (Z80Context* ctx); +static void LD_D_SLA_off_IX_d (Z80Context* ctx); +static void LD_D_SLA_off_IY_d (Z80Context* ctx); +static void LD_D_SLL_off_IX_d (Z80Context* ctx); +static void LD_D_SLL_off_IY_d (Z80Context* ctx); +static void LD_D_SRA_off_IX_d (Z80Context* ctx); +static void LD_D_SRA_off_IY_d (Z80Context* ctx); +static void LD_D_SRL_off_IX_d (Z80Context* ctx); +static void LD_D_SRL_off_IY_d (Z80Context* ctx); +static void LD_DE_off_nn (Z80Context* ctx); +static void LD_DE_nn (Z80Context* ctx); +static void LD_E_off_HL (Z80Context* ctx); +static void LD_E_off_IX_d (Z80Context* ctx); +static void LD_E_off_IY_d (Z80Context* ctx); +static void LD_E_A (Z80Context* ctx); +static void LD_E_B (Z80Context* ctx); +static void LD_E_C (Z80Context* ctx); +static void LD_E_D (Z80Context* ctx); +static void LD_E_E (Z80Context* ctx); +static void LD_E_H (Z80Context* ctx); +static void LD_E_IXh (Z80Context* ctx); +static void LD_E_IXl (Z80Context* ctx); +static void LD_E_IYh (Z80Context* ctx); +static void LD_E_IYl (Z80Context* ctx); +static void LD_E_L (Z80Context* ctx); +static void LD_E_n (Z80Context* ctx); +static void LD_E_RES_0_off_IX_d (Z80Context* ctx); +static void LD_E_RES_0_off_IY_d (Z80Context* ctx); +static void LD_E_RES_1_off_IX_d (Z80Context* ctx); +static void LD_E_RES_1_off_IY_d (Z80Context* ctx); +static void LD_E_RES_2_off_IX_d (Z80Context* ctx); +static void LD_E_RES_2_off_IY_d (Z80Context* ctx); +static void LD_E_RES_3_off_IX_d (Z80Context* ctx); +static void LD_E_RES_3_off_IY_d (Z80Context* ctx); +static void LD_E_RES_4_off_IX_d (Z80Context* ctx); +static void LD_E_RES_4_off_IY_d (Z80Context* ctx); +static void LD_E_RES_5_off_IX_d (Z80Context* ctx); +static void LD_E_RES_5_off_IY_d (Z80Context* ctx); +static void LD_E_RES_6_off_IX_d (Z80Context* ctx); +static void LD_E_RES_6_off_IY_d (Z80Context* ctx); +static void LD_E_RES_7_off_IX_d (Z80Context* ctx); +static void LD_E_RES_7_off_IY_d (Z80Context* ctx); +static void LD_E_RL_off_IX_d (Z80Context* ctx); +static void LD_E_RL_off_IY_d (Z80Context* ctx); +static void LD_E_RLC_off_IX_d (Z80Context* ctx); +static void LD_E_RLC_off_IY_d (Z80Context* ctx); +static void LD_E_RR_off_IX_d (Z80Context* ctx); +static void LD_E_RR_off_IY_d (Z80Context* ctx); +static void LD_E_RRC_off_IX_d (Z80Context* ctx); +static void LD_E_RRC_off_IY_d (Z80Context* ctx); +static void LD_E_SET_0_off_IX_d (Z80Context* ctx); +static void LD_E_SET_0_off_IY_d (Z80Context* ctx); +static void LD_E_SET_1_off_IX_d (Z80Context* ctx); +static void LD_E_SET_1_off_IY_d (Z80Context* ctx); +static void LD_E_SET_2_off_IX_d (Z80Context* ctx); +static void LD_E_SET_2_off_IY_d (Z80Context* ctx); +static void LD_E_SET_3_off_IX_d (Z80Context* ctx); +static void LD_E_SET_3_off_IY_d (Z80Context* ctx); +static void LD_E_SET_4_off_IX_d (Z80Context* ctx); +static void LD_E_SET_4_off_IY_d (Z80Context* ctx); +static void LD_E_SET_5_off_IX_d (Z80Context* ctx); +static void LD_E_SET_5_off_IY_d (Z80Context* ctx); +static void LD_E_SET_6_off_IX_d (Z80Context* ctx); +static void LD_E_SET_6_off_IY_d (Z80Context* ctx); +static void LD_E_SET_7_off_IX_d (Z80Context* ctx); +static void LD_E_SET_7_off_IY_d (Z80Context* ctx); +static void LD_E_SLA_off_IX_d (Z80Context* ctx); +static void LD_E_SLA_off_IY_d (Z80Context* ctx); +static void LD_E_SLL_off_IX_d (Z80Context* ctx); +static void LD_E_SLL_off_IY_d (Z80Context* ctx); +static void LD_E_SRA_off_IX_d (Z80Context* ctx); +static void LD_E_SRA_off_IY_d (Z80Context* ctx); +static void LD_E_SRL_off_IX_d (Z80Context* ctx); +static void LD_E_SRL_off_IY_d (Z80Context* ctx); +static void LD_H_off_HL (Z80Context* ctx); +static void LD_H_off_IX_d (Z80Context* ctx); +static void LD_H_off_IY_d (Z80Context* ctx); +static void LD_H_A (Z80Context* ctx); +static void LD_H_B (Z80Context* ctx); +static void LD_H_C (Z80Context* ctx); +static void LD_H_D (Z80Context* ctx); +static void LD_H_E (Z80Context* ctx); +static void LD_H_H (Z80Context* ctx); +static void LD_H_L (Z80Context* ctx); +static void LD_H_n (Z80Context* ctx); +static void LD_H_RES_0_off_IX_d (Z80Context* ctx); +static void LD_H_RES_0_off_IY_d (Z80Context* ctx); +static void LD_H_RES_1_off_IX_d (Z80Context* ctx); +static void LD_H_RES_1_off_IY_d (Z80Context* ctx); +static void LD_H_RES_2_off_IX_d (Z80Context* ctx); +static void LD_H_RES_2_off_IY_d (Z80Context* ctx); +static void LD_H_RES_3_off_IX_d (Z80Context* ctx); +static void LD_H_RES_3_off_IY_d (Z80Context* ctx); +static void LD_H_RES_4_off_IX_d (Z80Context* ctx); +static void LD_H_RES_4_off_IY_d (Z80Context* ctx); +static void LD_H_RES_5_off_IX_d (Z80Context* ctx); +static void LD_H_RES_5_off_IY_d (Z80Context* ctx); +static void LD_H_RES_6_off_IX_d (Z80Context* ctx); +static void LD_H_RES_6_off_IY_d (Z80Context* ctx); +static void LD_H_RES_7_off_IX_d (Z80Context* ctx); +static void LD_H_RES_7_off_IY_d (Z80Context* ctx); +static void LD_H_RL_off_IX_d (Z80Context* ctx); +static void LD_H_RL_off_IY_d (Z80Context* ctx); +static void LD_H_RLC_off_IX_d (Z80Context* ctx); +static void LD_H_RLC_off_IY_d (Z80Context* ctx); +static void LD_H_RR_off_IX_d (Z80Context* ctx); +static void LD_H_RR_off_IY_d (Z80Context* ctx); +static void LD_H_RRC_off_IX_d (Z80Context* ctx); +static void LD_H_RRC_off_IY_d (Z80Context* ctx); +static void LD_H_SET_0_off_IX_d (Z80Context* ctx); +static void LD_H_SET_0_off_IY_d (Z80Context* ctx); +static void LD_H_SET_1_off_IX_d (Z80Context* ctx); +static void LD_H_SET_1_off_IY_d (Z80Context* ctx); +static void LD_H_SET_2_off_IX_d (Z80Context* ctx); +static void LD_H_SET_2_off_IY_d (Z80Context* ctx); +static void LD_H_SET_3_off_IX_d (Z80Context* ctx); +static void LD_H_SET_3_off_IY_d (Z80Context* ctx); +static void LD_H_SET_4_off_IX_d (Z80Context* ctx); +static void LD_H_SET_4_off_IY_d (Z80Context* ctx); +static void LD_H_SET_5_off_IX_d (Z80Context* ctx); +static void LD_H_SET_5_off_IY_d (Z80Context* ctx); +static void LD_H_SET_6_off_IX_d (Z80Context* ctx); +static void LD_H_SET_6_off_IY_d (Z80Context* ctx); +static void LD_H_SET_7_off_IX_d (Z80Context* ctx); +static void LD_H_SET_7_off_IY_d (Z80Context* ctx); +static void LD_H_SLA_off_IX_d (Z80Context* ctx); +static void LD_H_SLA_off_IY_d (Z80Context* ctx); +static void LD_H_SLL_off_IX_d (Z80Context* ctx); +static void LD_H_SLL_off_IY_d (Z80Context* ctx); +static void LD_H_SRA_off_IX_d (Z80Context* ctx); +static void LD_H_SRA_off_IY_d (Z80Context* ctx); +static void LD_H_SRL_off_IX_d (Z80Context* ctx); +static void LD_H_SRL_off_IY_d (Z80Context* ctx); +static void LD_HL_off_nn (Z80Context* ctx); +static void LD_HL_nn (Z80Context* ctx); +static void LD_I_A (Z80Context* ctx); +static void LD_IX_off_nn (Z80Context* ctx); +static void LD_IX_nn (Z80Context* ctx); +static void LD_IXh_A (Z80Context* ctx); +static void LD_IXh_B (Z80Context* ctx); +static void LD_IXh_C (Z80Context* ctx); +static void LD_IXh_D (Z80Context* ctx); +static void LD_IXh_E (Z80Context* ctx); +static void LD_IXh_IXh (Z80Context* ctx); +static void LD_IXh_IXl (Z80Context* ctx); +static void LD_IXh_n (Z80Context* ctx); +static void LD_IXl_A (Z80Context* ctx); +static void LD_IXl_B (Z80Context* ctx); +static void LD_IXl_C (Z80Context* ctx); +static void LD_IXl_D (Z80Context* ctx); +static void LD_IXl_E (Z80Context* ctx); +static void LD_IXl_IXh (Z80Context* ctx); +static void LD_IXl_IXl (Z80Context* ctx); +static void LD_IXl_n (Z80Context* ctx); +static void LD_IY_off_nn (Z80Context* ctx); +static void LD_IY_nn (Z80Context* ctx); +static void LD_IYh_A (Z80Context* ctx); +static void LD_IYh_B (Z80Context* ctx); +static void LD_IYh_C (Z80Context* ctx); +static void LD_IYh_D (Z80Context* ctx); +static void LD_IYh_E (Z80Context* ctx); +static void LD_IYh_IYh (Z80Context* ctx); +static void LD_IYh_IYl (Z80Context* ctx); +static void LD_IYh_n (Z80Context* ctx); +static void LD_IYl_A (Z80Context* ctx); +static void LD_IYl_B (Z80Context* ctx); +static void LD_IYl_C (Z80Context* ctx); +static void LD_IYl_D (Z80Context* ctx); +static void LD_IYl_E (Z80Context* ctx); +static void LD_IYl_IYh (Z80Context* ctx); +static void LD_IYl_IYl (Z80Context* ctx); +static void LD_IYl_n (Z80Context* ctx); +static void LD_L_off_HL (Z80Context* ctx); +static void LD_L_off_IX_d (Z80Context* ctx); +static void LD_L_off_IY_d (Z80Context* ctx); +static void LD_L_A (Z80Context* ctx); +static void LD_L_B (Z80Context* ctx); +static void LD_L_C (Z80Context* ctx); +static void LD_L_D (Z80Context* ctx); +static void LD_L_E (Z80Context* ctx); +static void LD_L_H (Z80Context* ctx); +static void LD_L_L (Z80Context* ctx); +static void LD_L_n (Z80Context* ctx); +static void LD_L_RES_0_off_IX_d (Z80Context* ctx); +static void LD_L_RES_0_off_IY_d (Z80Context* ctx); +static void LD_L_RES_1_off_IX_d (Z80Context* ctx); +static void LD_L_RES_1_off_IY_d (Z80Context* ctx); +static void LD_L_RES_2_off_IX_d (Z80Context* ctx); +static void LD_L_RES_2_off_IY_d (Z80Context* ctx); +static void LD_L_RES_3_off_IX_d (Z80Context* ctx); +static void LD_L_RES_3_off_IY_d (Z80Context* ctx); +static void LD_L_RES_4_off_IX_d (Z80Context* ctx); +static void LD_L_RES_4_off_IY_d (Z80Context* ctx); +static void LD_L_RES_5_off_IX_d (Z80Context* ctx); +static void LD_L_RES_5_off_IY_d (Z80Context* ctx); +static void LD_L_RES_6_off_IX_d (Z80Context* ctx); +static void LD_L_RES_6_off_IY_d (Z80Context* ctx); +static void LD_L_RES_7_off_IX_d (Z80Context* ctx); +static void LD_L_RES_7_off_IY_d (Z80Context* ctx); +static void LD_L_RL_off_IX_d (Z80Context* ctx); +static void LD_L_RL_off_IY_d (Z80Context* ctx); +static void LD_L_RLC_off_IX_d (Z80Context* ctx); +static void LD_L_RLC_off_IY_d (Z80Context* ctx); +static void LD_L_RR_off_IX_d (Z80Context* ctx); +static void LD_L_RR_off_IY_d (Z80Context* ctx); +static void LD_L_RRC_off_IX_d (Z80Context* ctx); +static void LD_L_RRC_off_IY_d (Z80Context* ctx); +static void LD_L_SET_0_off_IX_d (Z80Context* ctx); +static void LD_L_SET_0_off_IY_d (Z80Context* ctx); +static void LD_L_SET_1_off_IX_d (Z80Context* ctx); +static void LD_L_SET_1_off_IY_d (Z80Context* ctx); +static void LD_L_SET_2_off_IX_d (Z80Context* ctx); +static void LD_L_SET_2_off_IY_d (Z80Context* ctx); +static void LD_L_SET_3_off_IX_d (Z80Context* ctx); +static void LD_L_SET_3_off_IY_d (Z80Context* ctx); +static void LD_L_SET_4_off_IX_d (Z80Context* ctx); +static void LD_L_SET_4_off_IY_d (Z80Context* ctx); +static void LD_L_SET_5_off_IX_d (Z80Context* ctx); +static void LD_L_SET_5_off_IY_d (Z80Context* ctx); +static void LD_L_SET_6_off_IX_d (Z80Context* ctx); +static void LD_L_SET_6_off_IY_d (Z80Context* ctx); +static void LD_L_SET_7_off_IX_d (Z80Context* ctx); +static void LD_L_SET_7_off_IY_d (Z80Context* ctx); +static void LD_L_SLA_off_IX_d (Z80Context* ctx); +static void LD_L_SLA_off_IY_d (Z80Context* ctx); +static void LD_L_SLL_off_IX_d (Z80Context* ctx); +static void LD_L_SLL_off_IY_d (Z80Context* ctx); +static void LD_L_SRA_off_IX_d (Z80Context* ctx); +static void LD_L_SRA_off_IY_d (Z80Context* ctx); +static void LD_L_SRL_off_IX_d (Z80Context* ctx); +static void LD_L_SRL_off_IY_d (Z80Context* ctx); +static void LD_R_A (Z80Context* ctx); +static void LD_SP_off_nn (Z80Context* ctx); +static void LD_SP_HL (Z80Context* ctx); +static void LD_SP_IX (Z80Context* ctx); +static void LD_SP_IY (Z80Context* ctx); +static void LD_SP_nn (Z80Context* ctx); +static void LDD (Z80Context* ctx); +static void LDDR (Z80Context* ctx); +static void LDI (Z80Context* ctx); +static void LDIR (Z80Context* ctx); +static void NEG (Z80Context* ctx); +static void NOP (Z80Context* ctx); +static void OR_off_HL (Z80Context* ctx); +static void OR_off_IX_d (Z80Context* ctx); +static void OR_off_IY_d (Z80Context* ctx); +static void OR_A (Z80Context* ctx); +static void OR_B (Z80Context* ctx); +static void OR_C (Z80Context* ctx); +static void OR_D (Z80Context* ctx); +static void OR_E (Z80Context* ctx); +static void OR_H (Z80Context* ctx); +static void OR_IXh (Z80Context* ctx); +static void OR_IXl (Z80Context* ctx); +static void OR_IYh (Z80Context* ctx); +static void OR_IYl (Z80Context* ctx); +static void OR_L (Z80Context* ctx); +static void OR_n (Z80Context* ctx); +static void OTDR (Z80Context* ctx); +static void OTIR (Z80Context* ctx); +static void OUT_off_C_0 (Z80Context* ctx); +static void OUT_off_C_A (Z80Context* ctx); +static void OUT_off_C_B (Z80Context* ctx); +static void OUT_off_C_C (Z80Context* ctx); +static void OUT_off_C_D (Z80Context* ctx); +static void OUT_off_C_E (Z80Context* ctx); +static void OUT_off_C_H (Z80Context* ctx); +static void OUT_off_C_L (Z80Context* ctx); +static void OUT_off_n_A (Z80Context* ctx); +static void OUTD (Z80Context* ctx); +static void OUTI (Z80Context* ctx); +static void POP_AF (Z80Context* ctx); +static void POP_BC (Z80Context* ctx); +static void POP_DE (Z80Context* ctx); +static void POP_HL (Z80Context* ctx); +static void POP_IX (Z80Context* ctx); +static void POP_IY (Z80Context* ctx); +static void PUSH_AF (Z80Context* ctx); +static void PUSH_BC (Z80Context* ctx); +static void PUSH_DE (Z80Context* ctx); +static void PUSH_HL (Z80Context* ctx); +static void PUSH_IX (Z80Context* ctx); +static void PUSH_IY (Z80Context* ctx); +static void RES_0_off_HL (Z80Context* ctx); +static void RES_0_off_IX_d (Z80Context* ctx); +static void RES_0_off_IY_d (Z80Context* ctx); +static void RES_0_A (Z80Context* ctx); +static void RES_0_B (Z80Context* ctx); +static void RES_0_C (Z80Context* ctx); +static void RES_0_D (Z80Context* ctx); +static void RES_0_E (Z80Context* ctx); +static void RES_0_H (Z80Context* ctx); +static void RES_0_L (Z80Context* ctx); +static void RES_1_off_HL (Z80Context* ctx); +static void RES_1_off_IX_d (Z80Context* ctx); +static void RES_1_off_IY_d (Z80Context* ctx); +static void RES_1_A (Z80Context* ctx); +static void RES_1_B (Z80Context* ctx); +static void RES_1_C (Z80Context* ctx); +static void RES_1_D (Z80Context* ctx); +static void RES_1_E (Z80Context* ctx); +static void RES_1_H (Z80Context* ctx); +static void RES_1_L (Z80Context* ctx); +static void RES_2_off_HL (Z80Context* ctx); +static void RES_2_off_IX_d (Z80Context* ctx); +static void RES_2_off_IY_d (Z80Context* ctx); +static void RES_2_A (Z80Context* ctx); +static void RES_2_B (Z80Context* ctx); +static void RES_2_C (Z80Context* ctx); +static void RES_2_D (Z80Context* ctx); +static void RES_2_E (Z80Context* ctx); +static void RES_2_H (Z80Context* ctx); +static void RES_2_L (Z80Context* ctx); +static void RES_3_off_HL (Z80Context* ctx); +static void RES_3_off_IX_d (Z80Context* ctx); +static void RES_3_off_IY_d (Z80Context* ctx); +static void RES_3_A (Z80Context* ctx); +static void RES_3_B (Z80Context* ctx); +static void RES_3_C (Z80Context* ctx); +static void RES_3_D (Z80Context* ctx); +static void RES_3_E (Z80Context* ctx); +static void RES_3_H (Z80Context* ctx); +static void RES_3_L (Z80Context* ctx); +static void RES_4_off_HL (Z80Context* ctx); +static void RES_4_off_IX_d (Z80Context* ctx); +static void RES_4_off_IY_d (Z80Context* ctx); +static void RES_4_A (Z80Context* ctx); +static void RES_4_B (Z80Context* ctx); +static void RES_4_C (Z80Context* ctx); +static void RES_4_D (Z80Context* ctx); +static void RES_4_E (Z80Context* ctx); +static void RES_4_H (Z80Context* ctx); +static void RES_4_L (Z80Context* ctx); +static void RES_5_off_HL (Z80Context* ctx); +static void RES_5_off_IX_d (Z80Context* ctx); +static void RES_5_off_IY_d (Z80Context* ctx); +static void RES_5_A (Z80Context* ctx); +static void RES_5_B (Z80Context* ctx); +static void RES_5_C (Z80Context* ctx); +static void RES_5_D (Z80Context* ctx); +static void RES_5_E (Z80Context* ctx); +static void RES_5_H (Z80Context* ctx); +static void RES_5_L (Z80Context* ctx); +static void RES_6_off_HL (Z80Context* ctx); +static void RES_6_off_IX_d (Z80Context* ctx); +static void RES_6_off_IY_d (Z80Context* ctx); +static void RES_6_A (Z80Context* ctx); +static void RES_6_B (Z80Context* ctx); +static void RES_6_C (Z80Context* ctx); +static void RES_6_D (Z80Context* ctx); +static void RES_6_E (Z80Context* ctx); +static void RES_6_H (Z80Context* ctx); +static void RES_6_L (Z80Context* ctx); +static void RES_7_off_HL (Z80Context* ctx); +static void RES_7_off_IX_d (Z80Context* ctx); +static void RES_7_off_IY_d (Z80Context* ctx); +static void RES_7_A (Z80Context* ctx); +static void RES_7_B (Z80Context* ctx); +static void RES_7_C (Z80Context* ctx); +static void RES_7_D (Z80Context* ctx); +static void RES_7_E (Z80Context* ctx); +static void RES_7_H (Z80Context* ctx); +static void RES_7_L (Z80Context* ctx); +static void RET (Z80Context* ctx); +static void RET_C (Z80Context* ctx); +static void RET_M (Z80Context* ctx); +static void RET_NC (Z80Context* ctx); +static void RET_NZ (Z80Context* ctx); +static void RET_P (Z80Context* ctx); +static void RET_PE (Z80Context* ctx); +static void RET_PO (Z80Context* ctx); +static void RET_Z (Z80Context* ctx); +static void RETI (Z80Context* ctx); +static void RETN (Z80Context* ctx); +static void RL_off_HL (Z80Context* ctx); +static void RL_off_IX_d (Z80Context* ctx); +static void RL_off_IY_d (Z80Context* ctx); +static void RL_A (Z80Context* ctx); +static void RL_B (Z80Context* ctx); +static void RL_C (Z80Context* ctx); +static void RL_D (Z80Context* ctx); +static void RL_E (Z80Context* ctx); +static void RL_H (Z80Context* ctx); +static void RL_L (Z80Context* ctx); +static void RLA (Z80Context* ctx); +static void RLC_off_HL (Z80Context* ctx); +static void RLC_off_IX_d (Z80Context* ctx); +static void RLC_off_IY_d (Z80Context* ctx); +static void RLC_A (Z80Context* ctx); +static void RLC_B (Z80Context* ctx); +static void RLC_C (Z80Context* ctx); +static void RLC_D (Z80Context* ctx); +static void RLC_E (Z80Context* ctx); +static void RLC_H (Z80Context* ctx); +static void RLC_L (Z80Context* ctx); +static void RLCA (Z80Context* ctx); +static void RLD (Z80Context* ctx); +static void RR_off_HL (Z80Context* ctx); +static void RR_off_IX_d (Z80Context* ctx); +static void RR_off_IY_d (Z80Context* ctx); +static void RR_A (Z80Context* ctx); +static void RR_B (Z80Context* ctx); +static void RR_C (Z80Context* ctx); +static void RR_D (Z80Context* ctx); +static void RR_E (Z80Context* ctx); +static void RR_H (Z80Context* ctx); +static void RR_L (Z80Context* ctx); +static void RRA (Z80Context* ctx); +static void RRC_off_HL (Z80Context* ctx); +static void RRC_off_IX_d (Z80Context* ctx); +static void RRC_off_IY_d (Z80Context* ctx); +static void RRC_A (Z80Context* ctx); +static void RRC_B (Z80Context* ctx); +static void RRC_C (Z80Context* ctx); +static void RRC_D (Z80Context* ctx); +static void RRC_E (Z80Context* ctx); +static void RRC_H (Z80Context* ctx); +static void RRC_L (Z80Context* ctx); +static void RRCA (Z80Context* ctx); +static void RRD (Z80Context* ctx); +static void RST_0H (Z80Context* ctx); +static void RST_10H (Z80Context* ctx); +static void RST_18H (Z80Context* ctx); +static void RST_20H (Z80Context* ctx); +static void RST_28H (Z80Context* ctx); +static void RST_30H (Z80Context* ctx); +static void RST_38H (Z80Context* ctx); +static void RST_8H (Z80Context* ctx); +static void SBC_A_off_HL (Z80Context* ctx); +static void SBC_A_off_IX_d (Z80Context* ctx); +static void SBC_A_off_IY_d (Z80Context* ctx); +static void SBC_A_A (Z80Context* ctx); +static void SBC_A_B (Z80Context* ctx); +static void SBC_A_C (Z80Context* ctx); +static void SBC_A_D (Z80Context* ctx); +static void SBC_A_E (Z80Context* ctx); +static void SBC_A_H (Z80Context* ctx); +static void SBC_A_IXh (Z80Context* ctx); +static void SBC_A_IXl (Z80Context* ctx); +static void SBC_A_IYh (Z80Context* ctx); +static void SBC_A_IYl (Z80Context* ctx); +static void SBC_A_L (Z80Context* ctx); +static void SBC_A_n (Z80Context* ctx); +static void SBC_HL_BC (Z80Context* ctx); +static void SBC_HL_DE (Z80Context* ctx); +static void SBC_HL_HL (Z80Context* ctx); +static void SBC_HL_SP (Z80Context* ctx); +static void SCF (Z80Context* ctx); +static void SET_0_off_HL (Z80Context* ctx); +static void SET_0_off_IX_d (Z80Context* ctx); +static void SET_0_off_IY_d (Z80Context* ctx); +static void SET_0_A (Z80Context* ctx); +static void SET_0_B (Z80Context* ctx); +static void SET_0_C (Z80Context* ctx); +static void SET_0_D (Z80Context* ctx); +static void SET_0_E (Z80Context* ctx); +static void SET_0_H (Z80Context* ctx); +static void SET_0_L (Z80Context* ctx); +static void SET_1_off_HL (Z80Context* ctx); +static void SET_1_off_IX_d (Z80Context* ctx); +static void SET_1_off_IY_d (Z80Context* ctx); +static void SET_1_A (Z80Context* ctx); +static void SET_1_B (Z80Context* ctx); +static void SET_1_C (Z80Context* ctx); +static void SET_1_D (Z80Context* ctx); +static void SET_1_E (Z80Context* ctx); +static void SET_1_H (Z80Context* ctx); +static void SET_1_L (Z80Context* ctx); +static void SET_2_off_HL (Z80Context* ctx); +static void SET_2_off_IX_d (Z80Context* ctx); +static void SET_2_off_IY_d (Z80Context* ctx); +static void SET_2_A (Z80Context* ctx); +static void SET_2_B (Z80Context* ctx); +static void SET_2_C (Z80Context* ctx); +static void SET_2_D (Z80Context* ctx); +static void SET_2_E (Z80Context* ctx); +static void SET_2_H (Z80Context* ctx); +static void SET_2_L (Z80Context* ctx); +static void SET_3_off_HL (Z80Context* ctx); +static void SET_3_off_IX_d (Z80Context* ctx); +static void SET_3_off_IY_d (Z80Context* ctx); +static void SET_3_A (Z80Context* ctx); +static void SET_3_B (Z80Context* ctx); +static void SET_3_C (Z80Context* ctx); +static void SET_3_D (Z80Context* ctx); +static void SET_3_E (Z80Context* ctx); +static void SET_3_H (Z80Context* ctx); +static void SET_3_L (Z80Context* ctx); +static void SET_4_off_HL (Z80Context* ctx); +static void SET_4_off_IX_d (Z80Context* ctx); +static void SET_4_off_IY_d (Z80Context* ctx); +static void SET_4_A (Z80Context* ctx); +static void SET_4_B (Z80Context* ctx); +static void SET_4_C (Z80Context* ctx); +static void SET_4_D (Z80Context* ctx); +static void SET_4_E (Z80Context* ctx); +static void SET_4_H (Z80Context* ctx); +static void SET_4_L (Z80Context* ctx); +static void SET_5_off_HL (Z80Context* ctx); +static void SET_5_off_IX_d (Z80Context* ctx); +static void SET_5_off_IY_d (Z80Context* ctx); +static void SET_5_A (Z80Context* ctx); +static void SET_5_B (Z80Context* ctx); +static void SET_5_C (Z80Context* ctx); +static void SET_5_D (Z80Context* ctx); +static void SET_5_E (Z80Context* ctx); +static void SET_5_H (Z80Context* ctx); +static void SET_5_L (Z80Context* ctx); +static void SET_6_off_HL (Z80Context* ctx); +static void SET_6_off_IX_d (Z80Context* ctx); +static void SET_6_off_IY_d (Z80Context* ctx); +static void SET_6_A (Z80Context* ctx); +static void SET_6_B (Z80Context* ctx); +static void SET_6_C (Z80Context* ctx); +static void SET_6_D (Z80Context* ctx); +static void SET_6_E (Z80Context* ctx); +static void SET_6_H (Z80Context* ctx); +static void SET_6_L (Z80Context* ctx); +static void SET_7_off_HL (Z80Context* ctx); +static void SET_7_off_IX_d (Z80Context* ctx); +static void SET_7_off_IY_d (Z80Context* ctx); +static void SET_7_A (Z80Context* ctx); +static void SET_7_B (Z80Context* ctx); +static void SET_7_C (Z80Context* ctx); +static void SET_7_D (Z80Context* ctx); +static void SET_7_E (Z80Context* ctx); +static void SET_7_H (Z80Context* ctx); +static void SET_7_L (Z80Context* ctx); +static void SLA_off_HL (Z80Context* ctx); +static void SLA_off_IX_d (Z80Context* ctx); +static void SLA_off_IY_d (Z80Context* ctx); +static void SLA_A (Z80Context* ctx); +static void SLA_B (Z80Context* ctx); +static void SLA_C (Z80Context* ctx); +static void SLA_D (Z80Context* ctx); +static void SLA_E (Z80Context* ctx); +static void SLA_H (Z80Context* ctx); +static void SLA_L (Z80Context* ctx); +static void SLL_off_HL (Z80Context* ctx); +static void SLL_off_IX_d (Z80Context* ctx); +static void SLL_off_IY_d (Z80Context* ctx); +static void SLL_A (Z80Context* ctx); +static void SLL_B (Z80Context* ctx); +static void SLL_C (Z80Context* ctx); +static void SLL_D (Z80Context* ctx); +static void SLL_E (Z80Context* ctx); +static void SLL_H (Z80Context* ctx); +static void SLL_L (Z80Context* ctx); +static void SRA_off_HL (Z80Context* ctx); +static void SRA_off_IX_d (Z80Context* ctx); +static void SRA_off_IY_d (Z80Context* ctx); +static void SRA_A (Z80Context* ctx); +static void SRA_B (Z80Context* ctx); +static void SRA_C (Z80Context* ctx); +static void SRA_D (Z80Context* ctx); +static void SRA_E (Z80Context* ctx); +static void SRA_H (Z80Context* ctx); +static void SRA_L (Z80Context* ctx); +static void SRL_off_HL (Z80Context* ctx); +static void SRL_off_IX_d (Z80Context* ctx); +static void SRL_off_IY_d (Z80Context* ctx); +static void SRL_A (Z80Context* ctx); +static void SRL_B (Z80Context* ctx); +static void SRL_C (Z80Context* ctx); +static void SRL_D (Z80Context* ctx); +static void SRL_E (Z80Context* ctx); +static void SRL_H (Z80Context* ctx); +static void SRL_L (Z80Context* ctx); +static void SUB_A_off_HL (Z80Context* ctx); +static void SUB_A_off_IX_d (Z80Context* ctx); +static void SUB_A_off_IY_d (Z80Context* ctx); +static void SUB_A_A (Z80Context* ctx); +static void SUB_A_B (Z80Context* ctx); +static void SUB_A_C (Z80Context* ctx); +static void SUB_A_D (Z80Context* ctx); +static void SUB_A_E (Z80Context* ctx); +static void SUB_A_H (Z80Context* ctx); +static void SUB_A_IXh (Z80Context* ctx); +static void SUB_A_IXl (Z80Context* ctx); +static void SUB_A_IYh (Z80Context* ctx); +static void SUB_A_IYl (Z80Context* ctx); +static void SUB_A_L (Z80Context* ctx); +static void SUB_A_n (Z80Context* ctx); +static void XOR_off_HL (Z80Context* ctx); +static void XOR_off_IX_d (Z80Context* ctx); +static void XOR_off_IY_d (Z80Context* ctx); +static void XOR_A (Z80Context* ctx); +static void XOR_B (Z80Context* ctx); +static void XOR_C (Z80Context* ctx); +static void XOR_D (Z80Context* ctx); +static void XOR_E (Z80Context* ctx); +static void XOR_H (Z80Context* ctx); +static void XOR_IXh (Z80Context* ctx); +static void XOR_IXl (Z80Context* ctx); +static void XOR_IYh (Z80Context* ctx); +static void XOR_IYl (Z80Context* ctx); +static void XOR_L (Z80Context* ctx); +static void XOR_n (Z80Context* ctx); diff --git a/emul/opcodes_impl.c b/emul/opcodes_impl.c new file mode 100644 index 0000000..abc3f8a --- /dev/null +++ b/emul/opcodes_impl.c @@ -0,0 +1,8804 @@ +// Generated by libz80 +static void ADC_A_off_HL (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, WR.HL), F1_ADC, F2_ADC); +} + + +static void ADC_A_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IX + displacement), F1_ADC, F2_ADC); + +} + + +static void ADC_A_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IY + displacement), F1_ADC, F2_ADC); + +} + + +static void ADC_A_A (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.A, F1_ADC, F2_ADC); +} + + +static void ADC_A_B (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.B, F1_ADC, F2_ADC); +} + + +static void ADC_A_C (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.C, F1_ADC, F2_ADC); +} + + +static void ADC_A_D (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.D, F1_ADC, F2_ADC); +} + + +static void ADC_A_E (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.E, F1_ADC, F2_ADC); +} + + +static void ADC_A_H (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.H, F1_ADC, F2_ADC); +} + + +static void ADC_A_IXh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXh, F1_ADC, F2_ADC); +} + + +static void ADC_A_IXl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXl, F1_ADC, F2_ADC); +} + + +static void ADC_A_IYh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYh, F1_ADC, F2_ADC); +} + + +static void ADC_A_IYl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYl, F1_ADC, F2_ADC); +} + + +static void ADC_A_L (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.L, F1_ADC, F2_ADC); +} + + +static void ADC_A_n (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, ctx->PC++), F1_ADC, F2_ADC); +} + + +static void ADC_HL_BC (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.BC, F1_ADC, F2_ADC); +} + + +static void ADC_HL_DE (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.DE, F1_ADC, F2_ADC); +} + + +static void ADC_HL_HL (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.HL, F1_ADC, F2_ADC); +} + + +static void ADC_HL_SP (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.SP, F1_ADC, F2_ADC); +} + + +static void ADD_A_off_HL (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, WR.HL), F1_ADD, F2_ADD); +} + + +static void ADD_A_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IX + displacement), F1_ADD, F2_ADD); + +} + + +static void ADD_A_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IY + displacement), F1_ADD, F2_ADD); + +} + + +static void ADD_A_A (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.A, F1_ADD, F2_ADD); +} + + +static void ADD_A_B (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.B, F1_ADD, F2_ADD); +} + + +static void ADD_A_C (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.C, F1_ADD, F2_ADD); +} + + +static void ADD_A_D (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.D, F1_ADD, F2_ADD); +} + + +static void ADD_A_E (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.E, F1_ADD, F2_ADD); +} + + +static void ADD_A_H (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.H, F1_ADD, F2_ADD); +} + + +static void ADD_A_IXh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXh, F1_ADD, F2_ADD); +} + + +static void ADD_A_IXl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXl, F1_ADD, F2_ADD); +} + + +static void ADD_A_IYh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYh, F1_ADD, F2_ADD); +} + + +static void ADD_A_IYl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYl, F1_ADD, F2_ADD); +} + + +static void ADD_A_L (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.L, F1_ADD, F2_ADD); +} + + +static void ADD_A_n (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, ctx->PC++), F1_ADD, F2_ADD); +} + + +static void ADD_HL_BC (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.BC, F1_ADD, F2_ADD); +} + + +static void ADD_HL_DE (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.DE, F1_ADD, F2_ADD); +} + + +static void ADD_HL_HL (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.HL, F1_ADD, F2_ADD); +} + + +static void ADD_HL_SP (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.SP, F1_ADD, F2_ADD); +} + + +static void ADD_IX_BC (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IX = doAddWord(ctx, WR.IX, WR.BC, 0, 0); +} + + +static void ADD_IX_DE (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IX = doAddWord(ctx, WR.IX, WR.DE, 0, 0); +} + + +static void ADD_IX_IX (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IX = doAddWord(ctx, WR.IX, WR.IX, 0, 0); +} + + +static void ADD_IX_SP (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IX = doAddWord(ctx, WR.IX, WR.SP, 0, 0); +} + + +static void ADD_IY_BC (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IY = doAddWord(ctx, WR.IY, WR.BC, 0, 0); +} + + +static void ADD_IY_DE (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IY = doAddWord(ctx, WR.IY, WR.DE, 0, 0); +} + + +static void ADD_IY_IY (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IY = doAddWord(ctx, WR.IY, WR.IY, 0, 0); +} + + +static void ADD_IY_SP (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.IY = doAddWord(ctx, WR.IY, WR.SP, 0, 0); +} + + +static void AND_off_HL (Z80Context* ctx) +{ + doAND(ctx, read8(ctx, WR.HL)); +} + + +static void AND_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + doAND(ctx, read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++))); +} + + +static void AND_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + doAND(ctx, read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++))); +} + + +static void AND_A (Z80Context* ctx) +{ + doAND(ctx, BR.A); +} + + +static void AND_B (Z80Context* ctx) +{ + doAND(ctx, BR.B); +} + + +static void AND_C (Z80Context* ctx) +{ + doAND(ctx, BR.C); +} + + +static void AND_D (Z80Context* ctx) +{ + doAND(ctx, BR.D); +} + + +static void AND_E (Z80Context* ctx) +{ + doAND(ctx, BR.E); +} + + +static void AND_H (Z80Context* ctx) +{ + doAND(ctx, BR.H); +} + + +static void AND_IXh (Z80Context* ctx) +{ + doAND(ctx, BR.IXh); +} + + +static void AND_IXl (Z80Context* ctx) +{ + doAND(ctx, BR.IXl); +} + + +static void AND_IYh (Z80Context* ctx) +{ + doAND(ctx, BR.IYh); +} + + +static void AND_IYl (Z80Context* ctx) +{ + doAND(ctx, BR.IYl); +} + + +static void AND_L (Z80Context* ctx) +{ + doAND(ctx, BR.L); +} + + +static void AND_n (Z80Context* ctx) +{ + doAND(ctx, read8(ctx, ctx->PC++)); +} + + +static void BIT_0_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 0, read8(ctx, WR.HL)); +} + + +static void BIT_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 0, address); +} + + +static void BIT_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 0, address); +} + + +static void BIT_0_A (Z80Context* ctx) +{ + doBIT_r(ctx, 0, BR.A); +} + + +static void BIT_0_B (Z80Context* ctx) +{ + doBIT_r(ctx, 0, BR.B); +} + + +static void BIT_0_C (Z80Context* ctx) +{ + doBIT_r(ctx, 0, BR.C); +} + + +static void BIT_0_D (Z80Context* ctx) +{ + doBIT_r(ctx, 0, BR.D); +} + + +static void BIT_0_E (Z80Context* ctx) +{ + doBIT_r(ctx, 0, BR.E); +} + + +static void BIT_0_H (Z80Context* ctx) +{ + doBIT_r(ctx, 0, BR.H); +} + + +static void BIT_0_L (Z80Context* ctx) +{ + doBIT_r(ctx, 0, BR.L); +} + + +static void BIT_1_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 1, read8(ctx, WR.HL)); +} + + +static void BIT_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 1, address); +} + + +static void BIT_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 1, address); +} + + +static void BIT_1_A (Z80Context* ctx) +{ + doBIT_r(ctx, 1, BR.A); +} + + +static void BIT_1_B (Z80Context* ctx) +{ + doBIT_r(ctx, 1, BR.B); +} + + +static void BIT_1_C (Z80Context* ctx) +{ + doBIT_r(ctx, 1, BR.C); +} + + +static void BIT_1_D (Z80Context* ctx) +{ + doBIT_r(ctx, 1, BR.D); +} + + +static void BIT_1_E (Z80Context* ctx) +{ + doBIT_r(ctx, 1, BR.E); +} + + +static void BIT_1_H (Z80Context* ctx) +{ + doBIT_r(ctx, 1, BR.H); +} + + +static void BIT_1_L (Z80Context* ctx) +{ + doBIT_r(ctx, 1, BR.L); +} + + +static void BIT_2_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 2, read8(ctx, WR.HL)); +} + + +static void BIT_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 2, address); +} + + +static void BIT_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 2, address); +} + + +static void BIT_2_A (Z80Context* ctx) +{ + doBIT_r(ctx, 2, BR.A); +} + + +static void BIT_2_B (Z80Context* ctx) +{ + doBIT_r(ctx, 2, BR.B); +} + + +static void BIT_2_C (Z80Context* ctx) +{ + doBIT_r(ctx, 2, BR.C); +} + + +static void BIT_2_D (Z80Context* ctx) +{ + doBIT_r(ctx, 2, BR.D); +} + + +static void BIT_2_E (Z80Context* ctx) +{ + doBIT_r(ctx, 2, BR.E); +} + + +static void BIT_2_H (Z80Context* ctx) +{ + doBIT_r(ctx, 2, BR.H); +} + + +static void BIT_2_L (Z80Context* ctx) +{ + doBIT_r(ctx, 2, BR.L); +} + + +static void BIT_3_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 3, read8(ctx, WR.HL)); +} + + +static void BIT_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 3, address); +} + + +static void BIT_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 3, address); +} + + +static void BIT_3_A (Z80Context* ctx) +{ + doBIT_r(ctx, 3, BR.A); +} + + +static void BIT_3_B (Z80Context* ctx) +{ + doBIT_r(ctx, 3, BR.B); +} + + +static void BIT_3_C (Z80Context* ctx) +{ + doBIT_r(ctx, 3, BR.C); +} + + +static void BIT_3_D (Z80Context* ctx) +{ + doBIT_r(ctx, 3, BR.D); +} + + +static void BIT_3_E (Z80Context* ctx) +{ + doBIT_r(ctx, 3, BR.E); +} + + +static void BIT_3_H (Z80Context* ctx) +{ + doBIT_r(ctx, 3, BR.H); +} + + +static void BIT_3_L (Z80Context* ctx) +{ + doBIT_r(ctx, 3, BR.L); +} + + +static void BIT_4_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 4, read8(ctx, WR.HL)); +} + + +static void BIT_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 4, address); +} + + +static void BIT_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 4, address); +} + + +static void BIT_4_A (Z80Context* ctx) +{ + doBIT_r(ctx, 4, BR.A); +} + + +static void BIT_4_B (Z80Context* ctx) +{ + doBIT_r(ctx, 4, BR.B); +} + + +static void BIT_4_C (Z80Context* ctx) +{ + doBIT_r(ctx, 4, BR.C); +} + + +static void BIT_4_D (Z80Context* ctx) +{ + doBIT_r(ctx, 4, BR.D); +} + + +static void BIT_4_E (Z80Context* ctx) +{ + doBIT_r(ctx, 4, BR.E); +} + + +static void BIT_4_H (Z80Context* ctx) +{ + doBIT_r(ctx, 4, BR.H); +} + + +static void BIT_4_L (Z80Context* ctx) +{ + doBIT_r(ctx, 4, BR.L); +} + + +static void BIT_5_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 5, read8(ctx, WR.HL)); +} + + +static void BIT_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 5, address); +} + + +static void BIT_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 5, address); +} + + +static void BIT_5_A (Z80Context* ctx) +{ + doBIT_r(ctx, 5, BR.A); +} + + +static void BIT_5_B (Z80Context* ctx) +{ + doBIT_r(ctx, 5, BR.B); +} + + +static void BIT_5_C (Z80Context* ctx) +{ + doBIT_r(ctx, 5, BR.C); +} + + +static void BIT_5_D (Z80Context* ctx) +{ + doBIT_r(ctx, 5, BR.D); +} + + +static void BIT_5_E (Z80Context* ctx) +{ + doBIT_r(ctx, 5, BR.E); +} + + +static void BIT_5_H (Z80Context* ctx) +{ + doBIT_r(ctx, 5, BR.H); +} + + +static void BIT_5_L (Z80Context* ctx) +{ + doBIT_r(ctx, 5, BR.L); +} + + +static void BIT_6_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 6, read8(ctx, WR.HL)); +} + + +static void BIT_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 6, address); +} + + +static void BIT_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 6, address); +} + + +static void BIT_6_A (Z80Context* ctx) +{ + doBIT_r(ctx, 6, BR.A); +} + + +static void BIT_6_B (Z80Context* ctx) +{ + doBIT_r(ctx, 6, BR.B); +} + + +static void BIT_6_C (Z80Context* ctx) +{ + doBIT_r(ctx, 6, BR.C); +} + + +static void BIT_6_D (Z80Context* ctx) +{ + doBIT_r(ctx, 6, BR.D); +} + + +static void BIT_6_E (Z80Context* ctx) +{ + doBIT_r(ctx, 6, BR.E); +} + + +static void BIT_6_H (Z80Context* ctx) +{ + doBIT_r(ctx, 6, BR.H); +} + + +static void BIT_6_L (Z80Context* ctx) +{ + doBIT_r(ctx, 6, BR.L); +} + + +static void BIT_7_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doBIT_r(ctx, 7, read8(ctx, WR.HL)); +} + + +static void BIT_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IX + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 7, address); +} + + +static void BIT_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + ushort address = WR.IY + (signed char) read8(ctx, ctx->PC++); + doBIT_indexed(ctx, 7, address); +} + + +static void BIT_7_A (Z80Context* ctx) +{ + doBIT_r(ctx, 7, BR.A); +} + + +static void BIT_7_B (Z80Context* ctx) +{ + doBIT_r(ctx, 7, BR.B); +} + + +static void BIT_7_C (Z80Context* ctx) +{ + doBIT_r(ctx, 7, BR.C); +} + + +static void BIT_7_D (Z80Context* ctx) +{ + doBIT_r(ctx, 7, BR.D); +} + + +static void BIT_7_E (Z80Context* ctx) +{ + doBIT_r(ctx, 7, BR.E); +} + + +static void BIT_7_H (Z80Context* ctx) +{ + doBIT_r(ctx, 7, BR.H); +} + + +static void BIT_7_L (Z80Context* ctx) +{ + doBIT_r(ctx, 7, BR.L); +} + + +static void CALL_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_C_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_C)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_M_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_M)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_NC_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_NC)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_NZ_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_NZ)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_P_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_P)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_PE_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_PE)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_PO_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_PO)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CALL_Z_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_Z)) + { + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = addr; + } + +} + + +static void CCF (Z80Context* ctx) +{ + VALFLAG(F_C, (1 - (byte)GETFLAG(F_C) != 0)); + RESFLAG(F_N); + adjustFlags(ctx, BR.A); +} + + +static void CP_off_HL (Z80Context* ctx) +{ + doCP_HL(ctx); +} + + +static void CP_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + byte val = read8(ctx, WR.IX + displacement); + doArithmetic(ctx, val, 0, 1); + adjustFlags(ctx, val); +} + + +static void CP_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + byte val = read8(ctx, WR.IY + displacement); + doArithmetic(ctx, val, 0, 1); + adjustFlags(ctx, val); +} + + +static void CP_A (Z80Context* ctx) +{ + doArithmetic(ctx, BR.A, 0, 1); + adjustFlags(ctx, BR.A); +} + + +static void CP_B (Z80Context* ctx) +{ + doArithmetic(ctx, BR.B, 0, 1); + adjustFlags(ctx, BR.B); +} + + +static void CP_C (Z80Context* ctx) +{ + doArithmetic(ctx, BR.C, 0, 1); + adjustFlags(ctx, BR.C); +} + + +static void CP_D (Z80Context* ctx) +{ + doArithmetic(ctx, BR.D, 0, 1); + adjustFlags(ctx, BR.D); +} + + +static void CP_E (Z80Context* ctx) +{ + doArithmetic(ctx, BR.E, 0, 1); + adjustFlags(ctx, BR.E); +} + + +static void CP_H (Z80Context* ctx) +{ + doArithmetic(ctx, BR.H, 0, 1); + adjustFlags(ctx, BR.H); +} + + +static void CP_IXh (Z80Context* ctx) +{ + doArithmetic(ctx, BR.IXh, 0, 1); + adjustFlags(ctx, BR.IXh); +} + + +static void CP_IXl (Z80Context* ctx) +{ + doArithmetic(ctx, BR.IXl, 0, 1); + adjustFlags(ctx, BR.IXl); +} + + +static void CP_IYh (Z80Context* ctx) +{ + doArithmetic(ctx, BR.IYh, 0, 1); + adjustFlags(ctx, BR.IYh); +} + + +static void CP_IYl (Z80Context* ctx) +{ + doArithmetic(ctx, BR.IYl, 0, 1); + adjustFlags(ctx, BR.IYl); +} + + +static void CP_L (Z80Context* ctx) +{ + doArithmetic(ctx, BR.L, 0, 1); + adjustFlags(ctx, BR.L); +} + + +static void CP_n (Z80Context* ctx) +{ + byte val = read8(ctx, ctx->PC++); + doArithmetic(ctx, val, 0, 1); + adjustFlags(ctx, val); +} + + +static void CPD (Z80Context* ctx) +{ + ctx->tstates += 5; + int carry = GETFLAG(F_C); + byte value = doCP_HL(ctx); + if(GETFLAG(F_H)) + value--; + WR.HL--; + WR.BC--; + VALFLAG(F_PV, WR.BC != 0); + if(carry) + SETFLAG(F_C); + else + RESFLAG(F_C); + VALFLAG(F_5, value & (1 << 1)); + VALFLAG(F_3, value & (1 << 3)); +} + + +static void CPDR (Z80Context* ctx) +{ + CPD(ctx); + if (WR.BC != 0 && !GETFLAG(F_Z)) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void CPI (Z80Context* ctx) +{ + ctx->tstates += 5; + int carry = GETFLAG(F_C); + byte value = doCP_HL(ctx); + if(GETFLAG(F_H)) + value--; + WR.HL++; + WR.BC--; + VALFLAG(F_PV, WR.BC != 0); + VALFLAG(F_C, carry); + VALFLAG(F_5, value & (1 << 2)); + VALFLAG(F_3, value & (1 << 3)); +} + + +static void CPIR (Z80Context* ctx) +{ + CPI(ctx); + if (WR.BC != 0 && !GETFLAG(F_Z)) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void CPL (Z80Context* ctx) +{ + BR.A = ~BR.A; + SETFLAG(F_H | F_N); + adjustFlags(ctx, BR.A); + +} + + +static void DAA (Z80Context* ctx) +{ + doDAA(ctx); + +} + + +static void DEC_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + byte value = read8(ctx, WR.HL); + write8(ctx, WR.HL, doIncDec(ctx, value, ID_DEC)); +} + + +static void DEC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 6; + signed char off = read8(ctx, ctx->PC++); + byte value = read8(ctx, WR.IX + off); + write8(ctx, WR.IX + off, doIncDec(ctx, value, ID_DEC)); + +} + + +static void DEC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 6; + signed char off = read8(ctx, ctx->PC++); + byte value = read8(ctx, WR.IY + off); + write8(ctx, WR.IY + off, doIncDec(ctx, value, ID_DEC)); + +} + + +static void DEC_A (Z80Context* ctx) +{ + BR.A = doIncDec(ctx, BR.A, ID_DEC); +} + + +static void DEC_B (Z80Context* ctx) +{ + BR.B = doIncDec(ctx, BR.B, ID_DEC); +} + + +static void DEC_BC (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.BC--; +} + + +static void DEC_C (Z80Context* ctx) +{ + BR.C = doIncDec(ctx, BR.C, ID_DEC); +} + + +static void DEC_D (Z80Context* ctx) +{ + BR.D = doIncDec(ctx, BR.D, ID_DEC); +} + + +static void DEC_DE (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.DE--; +} + + +static void DEC_E (Z80Context* ctx) +{ + BR.E = doIncDec(ctx, BR.E, ID_DEC); +} + + +static void DEC_H (Z80Context* ctx) +{ + BR.H = doIncDec(ctx, BR.H, ID_DEC); +} + + +static void DEC_HL (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.HL--; +} + + +static void DEC_IX (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.IX--; +} + + +static void DEC_IXh (Z80Context* ctx) +{ + BR.IXh = doIncDec(ctx, BR.IXh, ID_DEC); +} + + +static void DEC_IXl (Z80Context* ctx) +{ + BR.IXl = doIncDec(ctx, BR.IXl, ID_DEC); +} + + +static void DEC_IY (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.IY--; +} + + +static void DEC_IYh (Z80Context* ctx) +{ + BR.IYh = doIncDec(ctx, BR.IYh, ID_DEC); +} + + +static void DEC_IYl (Z80Context* ctx) +{ + BR.IYl = doIncDec(ctx, BR.IYl, ID_DEC); +} + + +static void DEC_L (Z80Context* ctx) +{ + BR.L = doIncDec(ctx, BR.L, ID_DEC); +} + + +static void DEC_SP (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.SP--; +} + + +static void DI (Z80Context* ctx) +{ + ctx->IFF1 = ctx->IFF2 = IE_DI; + ctx->defer_int = 1; +} + + +static void DJNZ_off_PC_e (Z80Context* ctx) +{ + ctx->tstates += 1; + signed char off = read8(ctx, ctx->PC++); + BR.B--; + if (BR.B) + { + ctx->tstates += 5; + ctx->PC += off; + } +} + + +static void EI (Z80Context* ctx) +{ + ctx->IFF1 = ctx->IFF2 = IE_EI; + ctx->defer_int = 1; +} + + +static void EX_off_SP_HL (Z80Context* ctx) +{ + ctx->tstates += 3; + ushort tmp = read16(ctx, WR.SP); + write16(ctx, WR.SP, WR.HL); + WR.HL = tmp; +} + + +static void EX_off_SP_IX (Z80Context* ctx) +{ + ctx->tstates += 3; + ushort tmp = read16(ctx, WR.SP); + write16(ctx, WR.SP, WR.IX); + WR.IX = tmp; +} + + +static void EX_off_SP_IY (Z80Context* ctx) +{ + ctx->tstates += 3; + ushort tmp = read16(ctx, WR.SP); + write16(ctx, WR.SP, WR.IY); + WR.IY = tmp; +} + + +static void EX_AF_AF_ (Z80Context* ctx) +{ + ushort tmp = ctx->R1.wr.AF; + ctx->R1.wr.AF = ctx->R2.wr.AF; + ctx->R2.wr.AF = tmp; +} + + +static void EX_DE_HL (Z80Context* ctx) +{ + ushort tmp = WR.DE; + WR.DE = WR.HL; + WR.HL = tmp; +} + + +static void EXX (Z80Context* ctx) +{ + ushort tmp; + tmp = ctx->R1.wr.BC; + ctx->R1.wr.BC = ctx->R2.wr.BC; + ctx->R2.wr.BC = tmp; + + tmp = ctx->R1.wr.DE; + ctx->R1.wr.DE = ctx->R2.wr.DE; + ctx->R2.wr.DE = tmp; + + tmp = ctx->R1.wr.HL; + ctx->R1.wr.HL = ctx->R2.wr.HL; + ctx->R2.wr.HL = tmp; +} + + +static void HALT (Z80Context* ctx) +{ + ctx->halted = 1; + ctx->PC--; +} + + +static void IM_0 (Z80Context* ctx) +{ + ctx->IM = 0; +} + + +static void IM_1 (Z80Context* ctx) +{ + ctx->IM = 1; +} + + +static void IM_2 (Z80Context* ctx) +{ + ctx->IM = 2; +} + + +static void IN_A_off_C (Z80Context* ctx) +{ + BR.A = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.A); + adjustFlags(ctx, BR.A); +} + + +static void IN_A_off_n (Z80Context* ctx) +{ + byte port = read8(ctx, ctx->PC++); + BR.A = ioRead(ctx, BR.A << 8 | port); +} + + +static void IN_B_off_C (Z80Context* ctx) +{ + BR.B = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.B); + adjustFlags(ctx, BR.B); +} + + +static void IN_C_off_C (Z80Context* ctx) +{ + BR.C = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.C); + adjustFlags(ctx, BR.C); +} + + +static void IN_D_off_C (Z80Context* ctx) +{ + BR.D = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.D); + adjustFlags(ctx, BR.D); +} + + +static void IN_E_off_C (Z80Context* ctx) +{ + BR.E = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.E); + adjustFlags(ctx, BR.E); +} + + +static void IN_F_off_C (Z80Context* ctx) +{ + BR.F = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.F); + adjustFlags(ctx, BR.F); +} + + +static void IN_H_off_C (Z80Context* ctx) +{ + BR.H = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.H); + adjustFlags(ctx, BR.H); +} + + +static void IN_L_off_C (Z80Context* ctx) +{ + BR.L = ioRead(ctx, WR.BC); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.L); + adjustFlags(ctx, BR.L); +} + + +static void INC_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + byte value = read8(ctx, WR.HL); + write8(ctx, WR.HL, doIncDec(ctx, value, ID_INC)); +} + + +static void INC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 6; + signed char off = read8(ctx, ctx->PC++); + byte value = read8(ctx, WR.IX + off); + write8(ctx, WR.IX + off, doIncDec(ctx, value, ID_INC)); + +} + + +static void INC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 6; + signed char off = read8(ctx, ctx->PC++); + byte value = read8(ctx, WR.IY + off); + write8(ctx, WR.IY + off, doIncDec(ctx, value, ID_INC)); + +} + + +static void INC_A (Z80Context* ctx) +{ + BR.A = doIncDec(ctx, BR.A, ID_INC); +} + + +static void INC_B (Z80Context* ctx) +{ + BR.B = doIncDec(ctx, BR.B, ID_INC); +} + + +static void INC_BC (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.BC++; +} + + +static void INC_C (Z80Context* ctx) +{ + BR.C = doIncDec(ctx, BR.C, ID_INC); +} + + +static void INC_D (Z80Context* ctx) +{ + BR.D = doIncDec(ctx, BR.D, ID_INC); +} + + +static void INC_DE (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.DE++; +} + + +static void INC_E (Z80Context* ctx) +{ + BR.E = doIncDec(ctx, BR.E, ID_INC); +} + + +static void INC_H (Z80Context* ctx) +{ + BR.H = doIncDec(ctx, BR.H, ID_INC); +} + + +static void INC_HL (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.HL++; +} + + +static void INC_IX (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.IX++; +} + + +static void INC_IXh (Z80Context* ctx) +{ + BR.IXh = doIncDec(ctx, BR.IXh, ID_INC); +} + + +static void INC_IXl (Z80Context* ctx) +{ + BR.IXl = doIncDec(ctx, BR.IXl, ID_INC); +} + + +static void INC_IY (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.IY++; +} + + +static void INC_IYh (Z80Context* ctx) +{ + BR.IYh = doIncDec(ctx, BR.IYh, ID_INC); +} + + +static void INC_IYl (Z80Context* ctx) +{ + BR.IYl = doIncDec(ctx, BR.IYl, ID_INC); +} + + +static void INC_L (Z80Context* ctx) +{ + BR.L = doIncDec(ctx, BR.L, ID_INC); +} + + +static void INC_SP (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.SP++; +} + + +static void IND (Z80Context* ctx) +{ + ctx->tstates += 1; + byte val = ioRead(ctx, WR.BC); + write8(ctx, WR.HL, val); + WR.HL--; + BR.B = doIncDec(ctx, BR.B, ID_DEC); + VALFLAG(F_N, (val & 0x80) != 0); + int flagval = val + ((BR.C - 1) & 0xff); + VALFLAG(F_H, flagval > 0xff); + VALFLAG(F_C, flagval > 0xff); + VALFLAG(F_PV, parityBit[(flagval & 7) ^ BR.B]); +} + + +static void INDR (Z80Context* ctx) +{ + IND(ctx); + if (BR.B != 0) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void INI (Z80Context* ctx) +{ + ctx->tstates += 1; + byte val = ioRead(ctx, WR.BC); + write8(ctx, WR.HL, val); + WR.HL++; + BR.B = doIncDec(ctx, BR.B, ID_DEC); + VALFLAG(F_N, (val & 0x80) != 0); + int flagval = val + ((BR.C + 1) & 0xff); + VALFLAG(F_H, flagval > 0xff); + VALFLAG(F_C, flagval > 0xff); + VALFLAG(F_PV, parityBit[(flagval & 7) ^ BR.B]); +} + + +static void INIR (Z80Context* ctx) +{ + INI(ctx); + if (BR.B != 0) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void JP_off_HL (Z80Context* ctx) +{ + ctx->PC = WR.HL; + +} + + +static void JP_off_IX (Z80Context* ctx) +{ + ctx->PC = WR.IX; + +} + + +static void JP_off_IY (Z80Context* ctx) +{ + ctx->PC = WR.IY; + +} + + +static void JP_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_)) + ctx->PC = addr; + +} + + +static void JP_C_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_C)) + ctx->PC = addr; + +} + + +static void JP_M_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_M)) + ctx->PC = addr; + +} + + +static void JP_NC_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_NC)) + ctx->PC = addr; + +} + + +static void JP_NZ_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_NZ)) + ctx->PC = addr; + +} + + +static void JP_P_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_P)) + ctx->PC = addr; + +} + + +static void JP_PE_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_PE)) + ctx->PC = addr; + +} + + +static void JP_PO_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_PO)) + ctx->PC = addr; + +} + + +static void JP_Z_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + if (condition(ctx, C_Z)) + ctx->PC = addr; + +} + + +static void JR_off_PC_e (Z80Context* ctx) +{ + int off = doComplement(read8(ctx, ctx->PC++)); + if (condition(ctx, C_)) + { + ctx->tstates += 5; + ctx->PC += off; + } +} + + +static void JR_C_off_PC_e (Z80Context* ctx) +{ + int off = doComplement(read8(ctx, ctx->PC++)); + if (condition(ctx, C_C)) + { + ctx->tstates += 5; + ctx->PC += off; + } +} + + +static void JR_NC_off_PC_e (Z80Context* ctx) +{ + int off = doComplement(read8(ctx, ctx->PC++)); + if (condition(ctx, C_NC)) + { + ctx->tstates += 5; + ctx->PC += off; + } +} + + +static void JR_NZ_off_PC_e (Z80Context* ctx) +{ + int off = doComplement(read8(ctx, ctx->PC++)); + if (condition(ctx, C_NZ)) + { + ctx->tstates += 5; + ctx->PC += off; + } +} + + +static void JR_Z_off_PC_e (Z80Context* ctx) +{ + int off = doComplement(read8(ctx, ctx->PC++)); + if (condition(ctx, C_Z)) + { + ctx->tstates += 5; + ctx->PC += off; + } +} + + +static void LD_off_BC_A (Z80Context* ctx) +{ + write8(ctx, WR.BC, BR.A); +} + + +static void LD_off_DE_A (Z80Context* ctx) +{ + write8(ctx, WR.DE, BR.A); +} + + +static void LD_off_HL_A (Z80Context* ctx) +{ + write8(ctx, WR.HL, BR.A); +} + + +static void LD_off_HL_B (Z80Context* ctx) +{ + write8(ctx, WR.HL, BR.B); +} + + +static void LD_off_HL_C (Z80Context* ctx) +{ + write8(ctx, WR.HL, BR.C); +} + + +static void LD_off_HL_D (Z80Context* ctx) +{ + write8(ctx, WR.HL, BR.D); +} + + +static void LD_off_HL_E (Z80Context* ctx) +{ + write8(ctx, WR.HL, BR.E); +} + + +static void LD_off_HL_H (Z80Context* ctx) +{ + write8(ctx, WR.HL, BR.H); +} + + +static void LD_off_HL_L (Z80Context* ctx) +{ + write8(ctx, WR.HL, BR.L); +} + + +static void LD_off_HL_n (Z80Context* ctx) +{ + write8(ctx, WR.HL, read8(ctx, ctx->PC++)); + +} + + +static void LD_off_IX_d_A (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++), BR.A); + +} + + +static void LD_off_IX_d_B (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++), BR.B); + +} + + +static void LD_off_IX_d_C (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++), BR.C); + +} + + +static void LD_off_IX_d_D (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++), BR.D); + +} + + +static void LD_off_IX_d_E (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++), BR.E); + +} + + +static void LD_off_IX_d_H (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++), BR.H); + +} + + +static void LD_off_IX_d_L (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++), BR.L); + +} + + +static void LD_off_IX_d_n (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char offset = read8(ctx, ctx->PC++); + byte n = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + offset, n); + +} + + +static void LD_off_IY_d_A (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++), BR.A); + +} + + +static void LD_off_IY_d_B (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++), BR.B); + +} + + +static void LD_off_IY_d_C (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++), BR.C); + +} + + +static void LD_off_IY_d_D (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++), BR.D); + +} + + +static void LD_off_IY_d_E (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++), BR.E); + +} + + +static void LD_off_IY_d_H (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++), BR.H); + +} + + +static void LD_off_IY_d_L (Z80Context* ctx) +{ + ctx->tstates += 5; + write8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++), BR.L); + +} + + +static void LD_off_IY_d_n (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char offset = read8(ctx, ctx->PC++); + byte n = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + offset, n); + +} + + +static void LD_off_nn_A (Z80Context* ctx) +{ + write8(ctx, read16(ctx, ctx->PC), BR.A); + ctx->PC += 2; + +} + + +static void LD_off_nn_BC (Z80Context* ctx) +{ + write16(ctx, read16(ctx, ctx->PC), WR.BC); + ctx->PC += 2; + +} + + +static void LD_off_nn_DE (Z80Context* ctx) +{ + write16(ctx, read16(ctx, ctx->PC), WR.DE); + ctx->PC += 2; + +} + + +static void LD_off_nn_HL (Z80Context* ctx) +{ + write16(ctx, read16(ctx, ctx->PC), WR.HL); + ctx->PC += 2; + +} + + +static void LD_off_nn_IX (Z80Context* ctx) +{ + write16(ctx, read16(ctx, ctx->PC), WR.IX); + ctx->PC += 2; + +} + + +static void LD_off_nn_IY (Z80Context* ctx) +{ + write16(ctx, read16(ctx, ctx->PC), WR.IY); + ctx->PC += 2; + +} + + +static void LD_off_nn_SP (Z80Context* ctx) +{ + write16(ctx, read16(ctx, ctx->PC), WR.SP); + ctx->PC += 2; + +} + + +static void LD_A_off_BC (Z80Context* ctx) +{ + BR.A = read8(ctx, WR.BC); +} + + +static void LD_A_off_DE (Z80Context* ctx) +{ + BR.A = read8(ctx, WR.DE); +} + + +static void LD_A_off_HL (Z80Context* ctx) +{ + BR.A = read8(ctx, WR.HL); +} + + +static void LD_A_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.A = read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_A_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.A = read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_A_off_nn (Z80Context* ctx) +{ + BR.A = read8(ctx, read16(ctx, ctx->PC)); + ctx->PC += 2; + +} + + +static void LD_A_A (Z80Context* ctx) +{ + BR.A = BR.A; +} + + +static void LD_A_B (Z80Context* ctx) +{ + BR.A = BR.B; +} + + +static void LD_A_C (Z80Context* ctx) +{ + BR.A = BR.C; +} + + +static void LD_A_D (Z80Context* ctx) +{ + BR.A = BR.D; +} + + +static void LD_A_E (Z80Context* ctx) +{ + BR.A = BR.E; +} + + +static void LD_A_H (Z80Context* ctx) +{ + BR.A = BR.H; +} + + +static void LD_A_I (Z80Context* ctx) +{ + ctx->tstates += 1; + BR.A = ctx->I; + adjustFlags(ctx, BR.A); + RESFLAG(F_H | F_N); + VALFLAG(F_PV, ctx->IFF2); + VALFLAG(F_S, (BR.A & 0x80) != 0); + VALFLAG(F_Z, (BR.A == 0)); + +} + + +static void LD_A_IXh (Z80Context* ctx) +{ + BR.A = BR.IXh; +} + + +static void LD_A_IXl (Z80Context* ctx) +{ + BR.A = BR.IXl; +} + + +static void LD_A_IYh (Z80Context* ctx) +{ + BR.A = BR.IYh; +} + + +static void LD_A_IYl (Z80Context* ctx) +{ + BR.A = BR.IYl; +} + + +static void LD_A_L (Z80Context* ctx) +{ + BR.A = BR.L; +} + + +static void LD_A_n (Z80Context* ctx) +{ + BR.A = read8(ctx, ctx->PC++); + +} + + +static void LD_A_R (Z80Context* ctx) +{ + ctx->tstates += 1; + BR.A = ctx->R; + adjustFlags(ctx, BR.A); + RESFLAG(F_H | F_N); + VALFLAG(F_PV, ctx->IFF2); + VALFLAG(F_S, (BR.A & 0x80) != 0); + VALFLAG(F_Z, (BR.A == 0)); + +} + + +static void LD_A_RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRL(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRL(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRLC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRLC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRR(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRR(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRRC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doRRC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.A); +} + + +static void LD_A_SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.A); +} + + +static void LD_A_SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSL(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.A); + +} + + +static void LD_A_SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSL(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.A); + +} + + +static void LD_A_SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSL(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.A); + +} + + +static void LD_A_SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSL(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.A); + +} + + +static void LD_A_SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSR(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.A); + +} + + +static void LD_A_SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSR(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.A); + +} + + +static void LD_A_SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSR(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.A); + +} + + +static void LD_A_SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.A = doSR(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.A); + +} + + +static void LD_B_off_HL (Z80Context* ctx) +{ + BR.B = read8(ctx, WR.HL); +} + + +static void LD_B_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.B = read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_B_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.B = read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_B_A (Z80Context* ctx) +{ + BR.B = BR.A; +} + + +static void LD_B_B (Z80Context* ctx) +{ + BR.B = BR.B; +} + + +static void LD_B_C (Z80Context* ctx) +{ + BR.B = BR.C; +} + + +static void LD_B_D (Z80Context* ctx) +{ + BR.B = BR.D; +} + + +static void LD_B_E (Z80Context* ctx) +{ + BR.B = BR.E; +} + + +static void LD_B_H (Z80Context* ctx) +{ + BR.B = BR.H; +} + + +static void LD_B_IXh (Z80Context* ctx) +{ + BR.B = BR.IXh; +} + + +static void LD_B_IXl (Z80Context* ctx) +{ + BR.B = BR.IXl; +} + + +static void LD_B_IYh (Z80Context* ctx) +{ + BR.B = BR.IYh; +} + + +static void LD_B_IYl (Z80Context* ctx) +{ + BR.B = BR.IYl; +} + + +static void LD_B_L (Z80Context* ctx) +{ + BR.B = BR.L; +} + + +static void LD_B_n (Z80Context* ctx) +{ + BR.B = read8(ctx, ctx->PC++); + +} + + +static void LD_B_RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRL(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRL(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRLC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRLC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRR(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRR(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRRC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doRRC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.B); +} + + +static void LD_B_SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.B); +} + + +static void LD_B_SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSL(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.B); + +} + + +static void LD_B_SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSL(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.B); + +} + + +static void LD_B_SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSL(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.B); + +} + + +static void LD_B_SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSL(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.B); + +} + + +static void LD_B_SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSR(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.B); + +} + + +static void LD_B_SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSR(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.B); + +} + + +static void LD_B_SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSR(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.B); + +} + + +static void LD_B_SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.B = doSR(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.B); + +} + + +static void LD_BC_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + WR.BC = read16(ctx, addr); +} + + +static void LD_BC_nn (Z80Context* ctx) +{ + WR.BC = read16(ctx, ctx->PC); + ctx->PC += 2; + +} + + +static void LD_C_off_HL (Z80Context* ctx) +{ + BR.C = read8(ctx, WR.HL); +} + + +static void LD_C_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.C = read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_C_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.C = read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_C_A (Z80Context* ctx) +{ + BR.C = BR.A; +} + + +static void LD_C_B (Z80Context* ctx) +{ + BR.C = BR.B; +} + + +static void LD_C_C (Z80Context* ctx) +{ + BR.C = BR.C; +} + + +static void LD_C_D (Z80Context* ctx) +{ + BR.C = BR.D; +} + + +static void LD_C_E (Z80Context* ctx) +{ + BR.C = BR.E; +} + + +static void LD_C_H (Z80Context* ctx) +{ + BR.C = BR.H; +} + + +static void LD_C_IXh (Z80Context* ctx) +{ + BR.C = BR.IXh; +} + + +static void LD_C_IXl (Z80Context* ctx) +{ + BR.C = BR.IXl; +} + + +static void LD_C_IYh (Z80Context* ctx) +{ + BR.C = BR.IYh; +} + + +static void LD_C_IYl (Z80Context* ctx) +{ + BR.C = BR.IYl; +} + + +static void LD_C_L (Z80Context* ctx) +{ + BR.C = BR.L; +} + + +static void LD_C_n (Z80Context* ctx) +{ + BR.C = read8(ctx, ctx->PC++); + +} + + +static void LD_C_RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRL(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRL(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRLC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRLC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRR(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRR(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRRC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doRRC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.C); +} + + +static void LD_C_SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.C); +} + + +static void LD_C_SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSL(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.C); + +} + + +static void LD_C_SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSL(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.C); + +} + + +static void LD_C_SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSL(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.C); + +} + + +static void LD_C_SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSL(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.C); + +} + + +static void LD_C_SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSR(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.C); + +} + + +static void LD_C_SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSR(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.C); + +} + + +static void LD_C_SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSR(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.C); + +} + + +static void LD_C_SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.C = doSR(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.C); + +} + + +static void LD_D_off_HL (Z80Context* ctx) +{ + BR.D = read8(ctx, WR.HL); +} + + +static void LD_D_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.D = read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_D_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.D = read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_D_A (Z80Context* ctx) +{ + BR.D = BR.A; +} + + +static void LD_D_B (Z80Context* ctx) +{ + BR.D = BR.B; +} + + +static void LD_D_C (Z80Context* ctx) +{ + BR.D = BR.C; +} + + +static void LD_D_D (Z80Context* ctx) +{ + BR.D = BR.D; +} + + +static void LD_D_E (Z80Context* ctx) +{ + BR.D = BR.E; +} + + +static void LD_D_H (Z80Context* ctx) +{ + BR.D = BR.H; +} + + +static void LD_D_IXh (Z80Context* ctx) +{ + BR.D = BR.IXh; +} + + +static void LD_D_IXl (Z80Context* ctx) +{ + BR.D = BR.IXl; +} + + +static void LD_D_IYh (Z80Context* ctx) +{ + BR.D = BR.IYh; +} + + +static void LD_D_IYl (Z80Context* ctx) +{ + BR.D = BR.IYl; +} + + +static void LD_D_L (Z80Context* ctx) +{ + BR.D = BR.L; +} + + +static void LD_D_n (Z80Context* ctx) +{ + BR.D = read8(ctx, ctx->PC++); + +} + + +static void LD_D_RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRL(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRL(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRLC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRLC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRR(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRR(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRRC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doRRC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.D); +} + + +static void LD_D_SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.D); +} + + +static void LD_D_SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSL(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.D); + +} + + +static void LD_D_SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSL(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.D); + +} + + +static void LD_D_SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSL(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.D); + +} + + +static void LD_D_SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSL(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.D); + +} + + +static void LD_D_SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSR(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.D); + +} + + +static void LD_D_SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSR(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.D); + +} + + +static void LD_D_SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSR(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.D); + +} + + +static void LD_D_SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.D = doSR(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.D); + +} + + +static void LD_DE_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + WR.DE = read16(ctx, addr); +} + + +static void LD_DE_nn (Z80Context* ctx) +{ + WR.DE = read16(ctx, ctx->PC); + ctx->PC += 2; + +} + + +static void LD_E_off_HL (Z80Context* ctx) +{ + BR.E = read8(ctx, WR.HL); +} + + +static void LD_E_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.E = read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_E_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.E = read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_E_A (Z80Context* ctx) +{ + BR.E = BR.A; +} + + +static void LD_E_B (Z80Context* ctx) +{ + BR.E = BR.B; +} + + +static void LD_E_C (Z80Context* ctx) +{ + BR.E = BR.C; +} + + +static void LD_E_D (Z80Context* ctx) +{ + BR.E = BR.D; +} + + +static void LD_E_E (Z80Context* ctx) +{ + BR.E = BR.E; +} + + +static void LD_E_H (Z80Context* ctx) +{ + BR.E = BR.H; +} + + +static void LD_E_IXh (Z80Context* ctx) +{ + BR.E = BR.IXh; +} + + +static void LD_E_IXl (Z80Context* ctx) +{ + BR.E = BR.IXl; +} + + +static void LD_E_IYh (Z80Context* ctx) +{ + BR.E = BR.IYh; +} + + +static void LD_E_IYl (Z80Context* ctx) +{ + BR.E = BR.IYl; +} + + +static void LD_E_L (Z80Context* ctx) +{ + BR.E = BR.L; +} + + +static void LD_E_n (Z80Context* ctx) +{ + BR.E = read8(ctx, ctx->PC++); + +} + + +static void LD_E_RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRL(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRL(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRLC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRLC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRR(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRR(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRRC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doRRC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.E); +} + + +static void LD_E_SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.E); +} + + +static void LD_E_SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSL(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.E); + +} + + +static void LD_E_SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSL(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.E); + +} + + +static void LD_E_SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSL(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.E); + +} + + +static void LD_E_SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSL(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.E); + +} + + +static void LD_E_SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSR(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.E); + +} + + +static void LD_E_SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSR(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.E); + +} + + +static void LD_E_SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSR(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.E); + +} + + +static void LD_E_SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.E = doSR(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.E); + +} + + +static void LD_H_off_HL (Z80Context* ctx) +{ + BR.H = read8(ctx, WR.HL); +} + + +static void LD_H_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.H = read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_H_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.H = read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_H_A (Z80Context* ctx) +{ + BR.H = BR.A; +} + + +static void LD_H_B (Z80Context* ctx) +{ + BR.H = BR.B; +} + + +static void LD_H_C (Z80Context* ctx) +{ + BR.H = BR.C; +} + + +static void LD_H_D (Z80Context* ctx) +{ + BR.H = BR.D; +} + + +static void LD_H_E (Z80Context* ctx) +{ + BR.H = BR.E; +} + + +static void LD_H_H (Z80Context* ctx) +{ + BR.H = BR.H; +} + + +static void LD_H_L (Z80Context* ctx) +{ + BR.H = BR.L; +} + + +static void LD_H_n (Z80Context* ctx) +{ + BR.H = read8(ctx, ctx->PC++); + +} + + +static void LD_H_RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRL(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRL(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRLC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRLC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRR(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRR(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRRC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doRRC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.H); +} + + +static void LD_H_SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.H); +} + + +static void LD_H_SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSL(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.H); + +} + + +static void LD_H_SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSL(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.H); + +} + + +static void LD_H_SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSL(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.H); + +} + + +static void LD_H_SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSL(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.H); + +} + + +static void LD_H_SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSR(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.H); + +} + + +static void LD_H_SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSR(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.H); + +} + + +static void LD_H_SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSR(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.H); + +} + + +static void LD_H_SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.H = doSR(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.H); + +} + + +static void LD_HL_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + WR.HL = read16(ctx, addr); +} + + +static void LD_HL_nn (Z80Context* ctx) +{ + WR.HL = read16(ctx, ctx->PC); + ctx->PC += 2; + +} + + +static void LD_I_A (Z80Context* ctx) +{ + ctx->tstates += 1; + ctx->I = BR.A; +} + + +static void LD_IX_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + WR.IX = read16(ctx, addr); +} + + +static void LD_IX_nn (Z80Context* ctx) +{ + WR.IX = read16(ctx, ctx->PC); + ctx->PC += 2; + +} + + +static void LD_IXh_A (Z80Context* ctx) +{ + BR.IXh = BR.A; +} + + +static void LD_IXh_B (Z80Context* ctx) +{ + BR.IXh = BR.B; +} + + +static void LD_IXh_C (Z80Context* ctx) +{ + BR.IXh = BR.C; +} + + +static void LD_IXh_D (Z80Context* ctx) +{ + BR.IXh = BR.D; +} + + +static void LD_IXh_E (Z80Context* ctx) +{ + BR.IXh = BR.E; +} + + +static void LD_IXh_IXh (Z80Context* ctx) +{ + BR.IXh = BR.IXh; +} + + +static void LD_IXh_IXl (Z80Context* ctx) +{ + BR.IXh = BR.IXl; +} + + +static void LD_IXh_n (Z80Context* ctx) +{ + BR.IXh = read8(ctx, ctx->PC++); + +} + + +static void LD_IXl_A (Z80Context* ctx) +{ + BR.IXl = BR.A; +} + + +static void LD_IXl_B (Z80Context* ctx) +{ + BR.IXl = BR.B; +} + + +static void LD_IXl_C (Z80Context* ctx) +{ + BR.IXl = BR.C; +} + + +static void LD_IXl_D (Z80Context* ctx) +{ + BR.IXl = BR.D; +} + + +static void LD_IXl_E (Z80Context* ctx) +{ + BR.IXl = BR.E; +} + + +static void LD_IXl_IXh (Z80Context* ctx) +{ + BR.IXl = BR.IXh; +} + + +static void LD_IXl_IXl (Z80Context* ctx) +{ + BR.IXl = BR.IXl; +} + + +static void LD_IXl_n (Z80Context* ctx) +{ + BR.IXl = read8(ctx, ctx->PC++); + +} + + +static void LD_IY_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + WR.IY = read16(ctx, addr); +} + + +static void LD_IY_nn (Z80Context* ctx) +{ + WR.IY = read16(ctx, ctx->PC); + ctx->PC += 2; + +} + + +static void LD_IYh_A (Z80Context* ctx) +{ + BR.IYh = BR.A; +} + + +static void LD_IYh_B (Z80Context* ctx) +{ + BR.IYh = BR.B; +} + + +static void LD_IYh_C (Z80Context* ctx) +{ + BR.IYh = BR.C; +} + + +static void LD_IYh_D (Z80Context* ctx) +{ + BR.IYh = BR.D; +} + + +static void LD_IYh_E (Z80Context* ctx) +{ + BR.IYh = BR.E; +} + + +static void LD_IYh_IYh (Z80Context* ctx) +{ + BR.IYh = BR.IYh; +} + + +static void LD_IYh_IYl (Z80Context* ctx) +{ + BR.IYh = BR.IYl; +} + + +static void LD_IYh_n (Z80Context* ctx) +{ + BR.IYh = read8(ctx, ctx->PC++); + +} + + +static void LD_IYl_A (Z80Context* ctx) +{ + BR.IYl = BR.A; +} + + +static void LD_IYl_B (Z80Context* ctx) +{ + BR.IYl = BR.B; +} + + +static void LD_IYl_C (Z80Context* ctx) +{ + BR.IYl = BR.C; +} + + +static void LD_IYl_D (Z80Context* ctx) +{ + BR.IYl = BR.D; +} + + +static void LD_IYl_E (Z80Context* ctx) +{ + BR.IYl = BR.E; +} + + +static void LD_IYl_IYh (Z80Context* ctx) +{ + BR.IYl = BR.IYh; +} + + +static void LD_IYl_IYl (Z80Context* ctx) +{ + BR.IYl = BR.IYl; +} + + +static void LD_IYl_n (Z80Context* ctx) +{ + BR.IYl = read8(ctx, ctx->PC++); + +} + + +static void LD_L_off_HL (Z80Context* ctx) +{ + BR.L = read8(ctx, WR.HL); +} + + +static void LD_L_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.L = read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_L_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + BR.L = read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++)); +} + + +static void LD_L_A (Z80Context* ctx) +{ + BR.L = BR.A; +} + + +static void LD_L_B (Z80Context* ctx) +{ + BR.L = BR.B; +} + + +static void LD_L_C (Z80Context* ctx) +{ + BR.L = BR.C; +} + + +static void LD_L_D (Z80Context* ctx) +{ + BR.L = BR.D; +} + + +static void LD_L_E (Z80Context* ctx) +{ + BR.L = BR.E; +} + + +static void LD_L_H (Z80Context* ctx) +{ + BR.L = BR.H; +} + + +static void LD_L_L (Z80Context* ctx) +{ + BR.L = BR.L; +} + + +static void LD_L_n (Z80Context* ctx) +{ + BR.L = read8(ctx, ctx->PC++); + +} + + +static void LD_L_RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRL(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRL(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRLC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRLC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRR(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRR(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRRC(ctx, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doRRC(ctx, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off)); + write8(ctx, WR.IX + off, BR.L); +} + + +static void LD_L_SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off)); + write8(ctx, WR.IY + off, BR.L); +} + + +static void LD_L_SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSL(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.L); + +} + + +static void LD_L_SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSL(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.L); + +} + + +static void LD_L_SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSL(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.L); + +} + + +static void LD_L_SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSL(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.L); + +} + + +static void LD_L_SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSR(ctx, read8(ctx, WR.IX + off), 1); + write8(ctx, WR.IX + off, BR.L); + +} + + +static void LD_L_SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSR(ctx, read8(ctx, WR.IY + off), 1); + write8(ctx, WR.IY + off, BR.L); + +} + + +static void LD_L_SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSR(ctx, read8(ctx, WR.IX + off), 0); + write8(ctx, WR.IX + off, BR.L); + +} + + +static void LD_L_SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + BR.L = doSR(ctx, read8(ctx, WR.IY + off), 0); + write8(ctx, WR.IY + off, BR.L); + +} + + +static void LD_R_A (Z80Context* ctx) +{ + ctx->tstates += 1; + ctx->R = BR.A; +} + + +static void LD_SP_off_nn (Z80Context* ctx) +{ + ushort addr = read16(ctx, ctx->PC); + ctx->PC += 2; + WR.SP = read16(ctx, addr); +} + + +static void LD_SP_HL (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.SP = WR.HL; +} + + +static void LD_SP_IX (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.SP = WR.IX; +} + + +static void LD_SP_IY (Z80Context* ctx) +{ + ctx->tstates += 2; + WR.SP = WR.IY; +} + + +static void LD_SP_nn (Z80Context* ctx) +{ + WR.SP = read16(ctx, ctx->PC); + ctx->PC += 2; + +} + + +static void LDD (Z80Context* ctx) +{ + ctx->tstates += 2; + byte val = read8(ctx, WR.HL); + write8(ctx, WR.DE, val); + WR.DE--; + WR.HL--; + WR.BC--; + VALFLAG(F_5, ((BR.A + val) & 0x02) != 0); + VALFLAG(F_3, ((BR.A + val) & F_3) != 0); + RESFLAG(F_H | F_N); + VALFLAG(F_PV, WR.BC != 0); +} + + +static void LDDR (Z80Context* ctx) +{ + LDD(ctx); + if (WR.BC != 0) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void LDI (Z80Context* ctx) +{ + ctx->tstates += 2; + byte val = read8(ctx, WR.HL); + write8(ctx, WR.DE, val); + WR.DE++; + WR.HL++; + WR.BC--; + VALFLAG(F_5, (BR.A + val) & 0x02); + VALFLAG(F_3, ((BR.A + val) & F_3) != 0); + RESFLAG(F_H | F_N); + VALFLAG(F_PV, WR.BC != 0); +} + + +static void LDIR (Z80Context* ctx) +{ + LDI(ctx); + if (WR.BC != 0) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void NEG (Z80Context* ctx) +{ + int temp = BR.A; + BR.A = 0; + BR.A = doArithmetic(ctx, temp, 0, 1); + SETFLAG(F_N); +} + + +static void NOP (Z80Context* ctx) +{ + /* NOP */ + +} + + +static void OR_off_HL (Z80Context* ctx) +{ + doOR(ctx, read8(ctx, WR.HL)); +} + + +static void OR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + doOR(ctx, read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++))); +} + + +static void OR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + doOR(ctx, read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++))); +} + + +static void OR_A (Z80Context* ctx) +{ + doOR(ctx, BR.A); +} + + +static void OR_B (Z80Context* ctx) +{ + doOR(ctx, BR.B); +} + + +static void OR_C (Z80Context* ctx) +{ + doOR(ctx, BR.C); +} + + +static void OR_D (Z80Context* ctx) +{ + doOR(ctx, BR.D); +} + + +static void OR_E (Z80Context* ctx) +{ + doOR(ctx, BR.E); +} + + +static void OR_H (Z80Context* ctx) +{ + doOR(ctx, BR.H); +} + + +static void OR_IXh (Z80Context* ctx) +{ + doOR(ctx, BR.IXh); +} + + +static void OR_IXl (Z80Context* ctx) +{ + doOR(ctx, BR.IXl); +} + + +static void OR_IYh (Z80Context* ctx) +{ + doOR(ctx, BR.IYh); +} + + +static void OR_IYl (Z80Context* ctx) +{ + doOR(ctx, BR.IYl); +} + + +static void OR_L (Z80Context* ctx) +{ + doOR(ctx, BR.L); +} + + +static void OR_n (Z80Context* ctx) +{ + doOR(ctx, read8(ctx, ctx->PC++)); +} + + +static void OTDR (Z80Context* ctx) +{ + OUTD(ctx); + if (BR.B != 0) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void OTIR (Z80Context* ctx) +{ + OUTI(ctx); + if (BR.B != 0) + { + ctx->tstates += 5; + ctx->PC -= 2; + } +} + + +static void OUT_off_C_0 (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, 0); + +} + + +static void OUT_off_C_A (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, BR.A); +} + + +static void OUT_off_C_B (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, BR.B); +} + + +static void OUT_off_C_C (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, BR.C); +} + + +static void OUT_off_C_D (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, BR.D); +} + + +static void OUT_off_C_E (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, BR.E); +} + + +static void OUT_off_C_H (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, BR.H); +} + + +static void OUT_off_C_L (Z80Context* ctx) +{ + ioWrite(ctx, WR.BC, BR.L); +} + + +static void OUT_off_n_A (Z80Context* ctx) +{ + ioWrite(ctx, BR.A << 8 | read8(ctx, ctx->PC++), BR.A); +} + + +static void OUTD (Z80Context* ctx) +{ + ctx->tstates += 1; + byte value = read8(ctx, WR.HL); + BR.B = doIncDec(ctx, BR.B, 1); + ioWrite(ctx, WR.BC, value); + WR.HL--; + int flag_value = value + BR.L; + VALFLAG(F_N, value & 0x80); + VALFLAG(F_H, flag_value > 0xff); + VALFLAG(F_C, flag_value > 0xff); + VALFLAG(F_PV, parityBit[(flag_value & 7) ^ BR.B]); + adjustFlags(ctx, BR.B); +} + + +static void OUTI (Z80Context* ctx) +{ + ctx->tstates += 1; + byte value = read8(ctx, WR.HL); + BR.B = doIncDec(ctx, BR.B, 1); + ioWrite(ctx, WR.BC, value); + WR.HL++; + int flag_value = value + BR.L; + VALFLAG(F_N, value & 0x80); + VALFLAG(F_H, flag_value > 0xff); + VALFLAG(F_C, flag_value > 0xff); + VALFLAG(F_PV, parityBit[(flag_value & 7) ^ BR.B]); + adjustFlags(ctx, BR.B); +} + + +static void POP_AF (Z80Context* ctx) +{ + WR.AF = doPop(ctx); +} + + +static void POP_BC (Z80Context* ctx) +{ + WR.BC = doPop(ctx); +} + + +static void POP_DE (Z80Context* ctx) +{ + WR.DE = doPop(ctx); +} + + +static void POP_HL (Z80Context* ctx) +{ + WR.HL = doPop(ctx); +} + + +static void POP_IX (Z80Context* ctx) +{ + WR.IX = doPop(ctx); +} + + +static void POP_IY (Z80Context* ctx) +{ + WR.IY = doPop(ctx); +} + + +static void PUSH_AF (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, WR.AF); +} + + +static void PUSH_BC (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, WR.BC); +} + + +static void PUSH_DE (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, WR.DE); +} + + +static void PUSH_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, WR.HL); +} + + +static void PUSH_IX (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, WR.IX); +} + + +static void PUSH_IY (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, WR.IY); +} + + +static void RES_0_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 0, read8(ctx, WR.HL))); +} + + +static void RES_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IX + off))); + + +} + + +static void RES_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 0, read8(ctx, WR.IY + off))); + + +} + + +static void RES_0_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 0, BR.A); +} + + +static void RES_0_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 0, BR.B); +} + + +static void RES_0_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 0, BR.C); +} + + +static void RES_0_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 0, BR.D); +} + + +static void RES_0_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 0, BR.E); +} + + +static void RES_0_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 0, BR.H); +} + + +static void RES_0_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 0, BR.L); +} + + +static void RES_1_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 1, read8(ctx, WR.HL))); +} + + +static void RES_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IX + off))); + + +} + + +static void RES_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 1, read8(ctx, WR.IY + off))); + + +} + + +static void RES_1_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 1, BR.A); +} + + +static void RES_1_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 1, BR.B); +} + + +static void RES_1_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 1, BR.C); +} + + +static void RES_1_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 1, BR.D); +} + + +static void RES_1_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 1, BR.E); +} + + +static void RES_1_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 1, BR.H); +} + + +static void RES_1_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 1, BR.L); +} + + +static void RES_2_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 2, read8(ctx, WR.HL))); +} + + +static void RES_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IX + off))); + + +} + + +static void RES_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 2, read8(ctx, WR.IY + off))); + + +} + + +static void RES_2_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 2, BR.A); +} + + +static void RES_2_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 2, BR.B); +} + + +static void RES_2_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 2, BR.C); +} + + +static void RES_2_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 2, BR.D); +} + + +static void RES_2_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 2, BR.E); +} + + +static void RES_2_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 2, BR.H); +} + + +static void RES_2_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 2, BR.L); +} + + +static void RES_3_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 3, read8(ctx, WR.HL))); +} + + +static void RES_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IX + off))); + + +} + + +static void RES_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 3, read8(ctx, WR.IY + off))); + + +} + + +static void RES_3_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 3, BR.A); +} + + +static void RES_3_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 3, BR.B); +} + + +static void RES_3_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 3, BR.C); +} + + +static void RES_3_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 3, BR.D); +} + + +static void RES_3_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 3, BR.E); +} + + +static void RES_3_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 3, BR.H); +} + + +static void RES_3_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 3, BR.L); +} + + +static void RES_4_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 4, read8(ctx, WR.HL))); +} + + +static void RES_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IX + off))); + + +} + + +static void RES_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 4, read8(ctx, WR.IY + off))); + + +} + + +static void RES_4_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 4, BR.A); +} + + +static void RES_4_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 4, BR.B); +} + + +static void RES_4_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 4, BR.C); +} + + +static void RES_4_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 4, BR.D); +} + + +static void RES_4_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 4, BR.E); +} + + +static void RES_4_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 4, BR.H); +} + + +static void RES_4_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 4, BR.L); +} + + +static void RES_5_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 5, read8(ctx, WR.HL))); +} + + +static void RES_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IX + off))); + + +} + + +static void RES_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 5, read8(ctx, WR.IY + off))); + + +} + + +static void RES_5_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 5, BR.A); +} + + +static void RES_5_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 5, BR.B); +} + + +static void RES_5_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 5, BR.C); +} + + +static void RES_5_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 5, BR.D); +} + + +static void RES_5_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 5, BR.E); +} + + +static void RES_5_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 5, BR.H); +} + + +static void RES_5_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 5, BR.L); +} + + +static void RES_6_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 6, read8(ctx, WR.HL))); +} + + +static void RES_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IX + off))); + + +} + + +static void RES_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 6, read8(ctx, WR.IY + off))); + + +} + + +static void RES_6_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 6, BR.A); +} + + +static void RES_6_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 6, BR.B); +} + + +static void RES_6_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 6, BR.C); +} + + +static void RES_6_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 6, BR.D); +} + + +static void RES_6_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 6, BR.E); +} + + +static void RES_6_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 6, BR.H); +} + + +static void RES_6_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 6, BR.L); +} + + +static void RES_7_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_RES, 7, read8(ctx, WR.HL))); +} + + +static void RES_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IX + off))); + + +} + + +static void RES_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_RES, 7, read8(ctx, WR.IY + off))); + + +} + + +static void RES_7_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_RES, 7, BR.A); +} + + +static void RES_7_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_RES, 7, BR.B); +} + + +static void RES_7_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_RES, 7, BR.C); +} + + +static void RES_7_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_RES, 7, BR.D); +} + + +static void RES_7_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_RES, 7, BR.E); +} + + +static void RES_7_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_RES, 7, BR.H); +} + + +static void RES_7_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_RES, 7, BR.L); +} + + +static void RET (Z80Context* ctx) +{ + ctx->PC = doPop(ctx); +} + + +static void RET_C (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_C)) + ctx->PC = doPop(ctx); + +} + + +static void RET_M (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_M)) + ctx->PC = doPop(ctx); + +} + + +static void RET_NC (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_NC)) + ctx->PC = doPop(ctx); + +} + + +static void RET_NZ (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_NZ)) + ctx->PC = doPop(ctx); + +} + + +static void RET_P (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_P)) + ctx->PC = doPop(ctx); + +} + + +static void RET_PE (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_PE)) + ctx->PC = doPop(ctx); + +} + + +static void RET_PO (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_PO)) + ctx->PC = doPop(ctx); + +} + + +static void RET_Z (Z80Context* ctx) +{ + ctx->tstates += 1; + if (condition(ctx, C_Z)) + ctx->PC = doPop(ctx); + +} + + +static void RETI (Z80Context* ctx) +{ + ctx->IFF1 = ctx->IFF2; + RET (ctx); + +} + + +static void RETN (Z80Context* ctx) +{ + ctx->IFF1 = ctx->IFF2; + RET(ctx); +} + + +static void RL_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doRL(ctx, 1, read8(ctx, WR.HL))); + +} + + +static void RL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doRL(ctx, 1, read8(ctx, WR.IX + off))); +} + + +static void RL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doRL(ctx, 1, read8(ctx, WR.IY + off))); +} + + +static void RL_A (Z80Context* ctx) +{ + BR.A = doRL(ctx, 1, BR.A); +} + + +static void RL_B (Z80Context* ctx) +{ + BR.B = doRL(ctx, 1, BR.B); +} + + +static void RL_C (Z80Context* ctx) +{ + BR.C = doRL(ctx, 1, BR.C); +} + + +static void RL_D (Z80Context* ctx) +{ + BR.D = doRL(ctx, 1, BR.D); +} + + +static void RL_E (Z80Context* ctx) +{ + BR.E = doRL(ctx, 1, BR.E); +} + + +static void RL_H (Z80Context* ctx) +{ + BR.H = doRL(ctx, 1, BR.H); +} + + +static void RL_L (Z80Context* ctx) +{ + BR.L = doRL(ctx, 1, BR.L); +} + + +static void RLA (Z80Context* ctx) +{ + BR.A = doRL(ctx, 0, BR.A); + + +} + + +static void RLC_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doRLC(ctx, 1, read8(ctx, WR.HL))); + +} + + +static void RLC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doRLC(ctx, 1, read8(ctx, WR.IX + off))); +} + + +static void RLC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doRLC(ctx, 1, read8(ctx, WR.IY + off))); +} + + +static void RLC_A (Z80Context* ctx) +{ + BR.A = doRLC(ctx, 1, BR.A); +} + + +static void RLC_B (Z80Context* ctx) +{ + BR.B = doRLC(ctx, 1, BR.B); +} + + +static void RLC_C (Z80Context* ctx) +{ + BR.C = doRLC(ctx, 1, BR.C); +} + + +static void RLC_D (Z80Context* ctx) +{ + BR.D = doRLC(ctx, 1, BR.D); +} + + +static void RLC_E (Z80Context* ctx) +{ + BR.E = doRLC(ctx, 1, BR.E); +} + + +static void RLC_H (Z80Context* ctx) +{ + BR.H = doRLC(ctx, 1, BR.H); +} + + +static void RLC_L (Z80Context* ctx) +{ + BR.L = doRLC(ctx, 1, BR.L); +} + + +static void RLCA (Z80Context* ctx) +{ + BR.A = doRLC(ctx, 0, BR.A); + + +} + + +static void RLD (Z80Context* ctx) +{ + ctx->tstates += 4; + byte Ah = BR.A & 0x0f; + byte hl = read8(ctx, WR.HL); + BR.A = (BR.A & 0xf0) | ((hl & 0xf0) >> 4); + hl = (hl << 4) | Ah; + write8(ctx, WR.HL, hl); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.A); + adjustFlags(ctx, BR.A); +} + + +static void RR_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doRR(ctx, 1, read8(ctx, WR.HL))); + +} + + +static void RR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doRR(ctx, 1, read8(ctx, WR.IX + off))); +} + + +static void RR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doRR(ctx, 1, read8(ctx, WR.IY + off))); +} + + +static void RR_A (Z80Context* ctx) +{ + BR.A = doRR(ctx, 1, BR.A); +} + + +static void RR_B (Z80Context* ctx) +{ + BR.B = doRR(ctx, 1, BR.B); +} + + +static void RR_C (Z80Context* ctx) +{ + BR.C = doRR(ctx, 1, BR.C); +} + + +static void RR_D (Z80Context* ctx) +{ + BR.D = doRR(ctx, 1, BR.D); +} + + +static void RR_E (Z80Context* ctx) +{ + BR.E = doRR(ctx, 1, BR.E); +} + + +static void RR_H (Z80Context* ctx) +{ + BR.H = doRR(ctx, 1, BR.H); +} + + +static void RR_L (Z80Context* ctx) +{ + BR.L = doRR(ctx, 1, BR.L); +} + + +static void RRA (Z80Context* ctx) +{ + BR.A = doRR(ctx, 0, BR.A); + + +} + + +static void RRC_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doRRC(ctx, 1, read8(ctx, WR.HL))); + +} + + +static void RRC_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doRRC(ctx, 1, read8(ctx, WR.IX + off))); +} + + +static void RRC_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doRRC(ctx, 1, read8(ctx, WR.IY + off))); +} + + +static void RRC_A (Z80Context* ctx) +{ + BR.A = doRRC(ctx, 1, BR.A); +} + + +static void RRC_B (Z80Context* ctx) +{ + BR.B = doRRC(ctx, 1, BR.B); +} + + +static void RRC_C (Z80Context* ctx) +{ + BR.C = doRRC(ctx, 1, BR.C); +} + + +static void RRC_D (Z80Context* ctx) +{ + BR.D = doRRC(ctx, 1, BR.D); +} + + +static void RRC_E (Z80Context* ctx) +{ + BR.E = doRRC(ctx, 1, BR.E); +} + + +static void RRC_H (Z80Context* ctx) +{ + BR.H = doRRC(ctx, 1, BR.H); +} + + +static void RRC_L (Z80Context* ctx) +{ + BR.L = doRRC(ctx, 1, BR.L); +} + + +static void RRCA (Z80Context* ctx) +{ + BR.A = doRRC(ctx, 0, BR.A); + + +} + + +static void RRD (Z80Context* ctx) +{ + ctx->tstates += 4; + byte Ah = BR.A & 0x0f; + byte hl = read8(ctx, WR.HL); + BR.A = (BR.A & 0xf0) | (hl & 0x0f); + hl = (hl >> 4) | (Ah << 4); + write8(ctx, WR.HL, hl); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, BR.A); +} + + +static void RST_0H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x00; + + +} + + +static void RST_10H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x010; + + +} + + +static void RST_18H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x018; + + +} + + +static void RST_20H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x020; + + +} + + +static void RST_28H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x028; + + +} + + +static void RST_30H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x030; + + +} + + +static void RST_38H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x038; + + +} + + +static void RST_8H (Z80Context* ctx) +{ + ctx->tstates += 1; + doPush(ctx, ctx->PC); + ctx->PC = 0x08; + + +} + + +static void SBC_A_off_HL (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, WR.HL), F1_SBC, F2_SBC); +} + + +static void SBC_A_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IX + displacement), F1_SBC, F2_SBC); + +} + + +static void SBC_A_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IY + displacement), F1_SBC, F2_SBC); + +} + + +static void SBC_A_A (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.A, F1_SBC, F2_SBC); +} + + +static void SBC_A_B (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.B, F1_SBC, F2_SBC); +} + + +static void SBC_A_C (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.C, F1_SBC, F2_SBC); +} + + +static void SBC_A_D (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.D, F1_SBC, F2_SBC); +} + + +static void SBC_A_E (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.E, F1_SBC, F2_SBC); +} + + +static void SBC_A_H (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.H, F1_SBC, F2_SBC); +} + + +static void SBC_A_IXh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXh, F1_SBC, F2_SBC); +} + + +static void SBC_A_IXl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXl, F1_SBC, F2_SBC); +} + + +static void SBC_A_IYh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYh, F1_SBC, F2_SBC); +} + + +static void SBC_A_IYl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYl, F1_SBC, F2_SBC); +} + + +static void SBC_A_L (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.L, F1_SBC, F2_SBC); +} + + +static void SBC_A_n (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, ctx->PC++), F1_SBC, F2_SBC); +} + + +static void SBC_HL_BC (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.BC, F1_SBC, F2_SBC); +} + + +static void SBC_HL_DE (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.DE, F1_SBC, F2_SBC); +} + + +static void SBC_HL_HL (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.HL, F1_SBC, F2_SBC); +} + + +static void SBC_HL_SP (Z80Context* ctx) +{ + ctx->tstates += 7; + WR.HL = doAddWord(ctx, WR.HL, WR.SP, F1_SBC, F2_SBC); +} + + +static void SCF (Z80Context* ctx) +{ + SETFLAG(F_C); + RESFLAG(F_N | F_H); + adjustFlags(ctx, BR.A); +} + + +static void SET_0_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 0, read8(ctx, WR.HL))); +} + + +static void SET_0_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IX + off))); + + +} + + +static void SET_0_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 0, read8(ctx, WR.IY + off))); + + +} + + +static void SET_0_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 0, BR.A); +} + + +static void SET_0_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 0, BR.B); +} + + +static void SET_0_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 0, BR.C); +} + + +static void SET_0_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 0, BR.D); +} + + +static void SET_0_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 0, BR.E); +} + + +static void SET_0_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 0, BR.H); +} + + +static void SET_0_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 0, BR.L); +} + + +static void SET_1_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 1, read8(ctx, WR.HL))); +} + + +static void SET_1_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IX + off))); + + +} + + +static void SET_1_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 1, read8(ctx, WR.IY + off))); + + +} + + +static void SET_1_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 1, BR.A); +} + + +static void SET_1_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 1, BR.B); +} + + +static void SET_1_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 1, BR.C); +} + + +static void SET_1_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 1, BR.D); +} + + +static void SET_1_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 1, BR.E); +} + + +static void SET_1_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 1, BR.H); +} + + +static void SET_1_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 1, BR.L); +} + + +static void SET_2_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 2, read8(ctx, WR.HL))); +} + + +static void SET_2_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IX + off))); + + +} + + +static void SET_2_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 2, read8(ctx, WR.IY + off))); + + +} + + +static void SET_2_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 2, BR.A); +} + + +static void SET_2_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 2, BR.B); +} + + +static void SET_2_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 2, BR.C); +} + + +static void SET_2_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 2, BR.D); +} + + +static void SET_2_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 2, BR.E); +} + + +static void SET_2_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 2, BR.H); +} + + +static void SET_2_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 2, BR.L); +} + + +static void SET_3_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 3, read8(ctx, WR.HL))); +} + + +static void SET_3_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IX + off))); + + +} + + +static void SET_3_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 3, read8(ctx, WR.IY + off))); + + +} + + +static void SET_3_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 3, BR.A); +} + + +static void SET_3_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 3, BR.B); +} + + +static void SET_3_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 3, BR.C); +} + + +static void SET_3_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 3, BR.D); +} + + +static void SET_3_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 3, BR.E); +} + + +static void SET_3_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 3, BR.H); +} + + +static void SET_3_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 3, BR.L); +} + + +static void SET_4_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 4, read8(ctx, WR.HL))); +} + + +static void SET_4_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IX + off))); + + +} + + +static void SET_4_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 4, read8(ctx, WR.IY + off))); + + +} + + +static void SET_4_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 4, BR.A); +} + + +static void SET_4_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 4, BR.B); +} + + +static void SET_4_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 4, BR.C); +} + + +static void SET_4_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 4, BR.D); +} + + +static void SET_4_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 4, BR.E); +} + + +static void SET_4_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 4, BR.H); +} + + +static void SET_4_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 4, BR.L); +} + + +static void SET_5_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 5, read8(ctx, WR.HL))); +} + + +static void SET_5_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IX + off))); + + +} + + +static void SET_5_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 5, read8(ctx, WR.IY + off))); + + +} + + +static void SET_5_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 5, BR.A); +} + + +static void SET_5_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 5, BR.B); +} + + +static void SET_5_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 5, BR.C); +} + + +static void SET_5_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 5, BR.D); +} + + +static void SET_5_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 5, BR.E); +} + + +static void SET_5_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 5, BR.H); +} + + +static void SET_5_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 5, BR.L); +} + + +static void SET_6_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 6, read8(ctx, WR.HL))); +} + + +static void SET_6_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IX + off))); + + +} + + +static void SET_6_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 6, read8(ctx, WR.IY + off))); + + +} + + +static void SET_6_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 6, BR.A); +} + + +static void SET_6_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 6, BR.B); +} + + +static void SET_6_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 6, BR.C); +} + + +static void SET_6_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 6, BR.D); +} + + +static void SET_6_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 6, BR.E); +} + + +static void SET_6_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 6, BR.H); +} + + +static void SET_6_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 6, BR.L); +} + + +static void SET_7_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSetRes(ctx, SR_SET, 7, read8(ctx, WR.HL))); +} + + +static void SET_7_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IX + off))); + + +} + + +static void SET_7_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSetRes(ctx, SR_SET, 7, read8(ctx, WR.IY + off))); + + +} + + +static void SET_7_A (Z80Context* ctx) +{ + BR.A = doSetRes(ctx, SR_SET, 7, BR.A); +} + + +static void SET_7_B (Z80Context* ctx) +{ + BR.B = doSetRes(ctx, SR_SET, 7, BR.B); +} + + +static void SET_7_C (Z80Context* ctx) +{ + BR.C = doSetRes(ctx, SR_SET, 7, BR.C); +} + + +static void SET_7_D (Z80Context* ctx) +{ + BR.D = doSetRes(ctx, SR_SET, 7, BR.D); +} + + +static void SET_7_E (Z80Context* ctx) +{ + BR.E = doSetRes(ctx, SR_SET, 7, BR.E); +} + + +static void SET_7_H (Z80Context* ctx) +{ + BR.H = doSetRes(ctx, SR_SET, 7, BR.H); +} + + +static void SET_7_L (Z80Context* ctx) +{ + BR.L = doSetRes(ctx, SR_SET, 7, BR.L); +} + + +static void SLA_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSL(ctx, read8(ctx, WR.HL), IA_A)); +} + + +static void SLA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSL(ctx, read8(ctx, WR.IX + off), IA_A)); +} + + +static void SLA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSL(ctx, read8(ctx, WR.IY + off), IA_A)); +} + + +static void SLA_A (Z80Context* ctx) +{ + BR.A = doSL(ctx, BR.A, IA_A); + + +} + + +static void SLA_B (Z80Context* ctx) +{ + BR.B = doSL(ctx, BR.B, IA_A); + + +} + + +static void SLA_C (Z80Context* ctx) +{ + BR.C = doSL(ctx, BR.C, IA_A); + + +} + + +static void SLA_D (Z80Context* ctx) +{ + BR.D = doSL(ctx, BR.D, IA_A); + + +} + + +static void SLA_E (Z80Context* ctx) +{ + BR.E = doSL(ctx, BR.E, IA_A); + + +} + + +static void SLA_H (Z80Context* ctx) +{ + BR.H = doSL(ctx, BR.H, IA_A); + + +} + + +static void SLA_L (Z80Context* ctx) +{ + BR.L = doSL(ctx, BR.L, IA_A); + + +} + + +static void SLL_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSL(ctx, read8(ctx, WR.HL), IA_L)); +} + + +static void SLL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSL(ctx, read8(ctx, WR.IX + off), IA_L)); +} + + +static void SLL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSL(ctx, read8(ctx, WR.IY + off), IA_L)); +} + + +static void SLL_A (Z80Context* ctx) +{ + BR.A = doSL(ctx, BR.A, IA_L); + + +} + + +static void SLL_B (Z80Context* ctx) +{ + BR.B = doSL(ctx, BR.B, IA_L); + + +} + + +static void SLL_C (Z80Context* ctx) +{ + BR.C = doSL(ctx, BR.C, IA_L); + + +} + + +static void SLL_D (Z80Context* ctx) +{ + BR.D = doSL(ctx, BR.D, IA_L); + + +} + + +static void SLL_E (Z80Context* ctx) +{ + BR.E = doSL(ctx, BR.E, IA_L); + + +} + + +static void SLL_H (Z80Context* ctx) +{ + BR.H = doSL(ctx, BR.H, IA_L); + + +} + + +static void SLL_L (Z80Context* ctx) +{ + BR.L = doSL(ctx, BR.L, IA_L); + + +} + + +static void SRA_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSR(ctx, read8(ctx, WR.HL), IA_A)); +} + + +static void SRA_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSR(ctx, read8(ctx, WR.IX + off), IA_A)); +} + + +static void SRA_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSR(ctx, read8(ctx, WR.IY + off), IA_A)); +} + + +static void SRA_A (Z80Context* ctx) +{ + BR.A = doSR(ctx, BR.A, IA_A); + + +} + + +static void SRA_B (Z80Context* ctx) +{ + BR.B = doSR(ctx, BR.B, IA_A); + + +} + + +static void SRA_C (Z80Context* ctx) +{ + BR.C = doSR(ctx, BR.C, IA_A); + + +} + + +static void SRA_D (Z80Context* ctx) +{ + BR.D = doSR(ctx, BR.D, IA_A); + + +} + + +static void SRA_E (Z80Context* ctx) +{ + BR.E = doSR(ctx, BR.E, IA_A); + + +} + + +static void SRA_H (Z80Context* ctx) +{ + BR.H = doSR(ctx, BR.H, IA_A); + + +} + + +static void SRA_L (Z80Context* ctx) +{ + BR.L = doSR(ctx, BR.L, IA_A); + + +} + + +static void SRL_off_HL (Z80Context* ctx) +{ + ctx->tstates += 1; + write8(ctx, WR.HL, doSR(ctx, read8(ctx, WR.HL), IA_L)); +} + + +static void SRL_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IX + off, doSR(ctx, read8(ctx, WR.IX + off), IA_L)); +} + + +static void SRL_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 2; + signed char off = read8(ctx, ctx->PC++); + write8(ctx, WR.IY + off, doSR(ctx, read8(ctx, WR.IY + off), IA_L)); +} + + +static void SRL_A (Z80Context* ctx) +{ + BR.A = doSR(ctx, BR.A, IA_L); + + +} + + +static void SRL_B (Z80Context* ctx) +{ + BR.B = doSR(ctx, BR.B, IA_L); + + +} + + +static void SRL_C (Z80Context* ctx) +{ + BR.C = doSR(ctx, BR.C, IA_L); + + +} + + +static void SRL_D (Z80Context* ctx) +{ + BR.D = doSR(ctx, BR.D, IA_L); + + +} + + +static void SRL_E (Z80Context* ctx) +{ + BR.E = doSR(ctx, BR.E, IA_L); + + +} + + +static void SRL_H (Z80Context* ctx) +{ + BR.H = doSR(ctx, BR.H, IA_L); + + +} + + +static void SRL_L (Z80Context* ctx) +{ + BR.L = doSR(ctx, BR.L, IA_L); + + +} + + +static void SUB_A_off_HL (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, WR.HL), F1_SUB, F2_SUB); +} + + +static void SUB_A_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IX + displacement), F1_SUB, F2_SUB); + +} + + +static void SUB_A_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + signed char displacement = read8(ctx, ctx->PC++); + BR.A = doArithmetic(ctx, read8(ctx, WR.IY + displacement), F1_SUB, F2_SUB); + +} + + +static void SUB_A_A (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.A, F1_SUB, F2_SUB); +} + + +static void SUB_A_B (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.B, F1_SUB, F2_SUB); +} + + +static void SUB_A_C (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.C, F1_SUB, F2_SUB); +} + + +static void SUB_A_D (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.D, F1_SUB, F2_SUB); +} + + +static void SUB_A_E (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.E, F1_SUB, F2_SUB); +} + + +static void SUB_A_H (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.H, F1_SUB, F2_SUB); +} + + +static void SUB_A_IXh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXh, F1_SUB, F2_SUB); +} + + +static void SUB_A_IXl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IXl, F1_SUB, F2_SUB); +} + + +static void SUB_A_IYh (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYh, F1_SUB, F2_SUB); +} + + +static void SUB_A_IYl (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.IYl, F1_SUB, F2_SUB); +} + + +static void SUB_A_L (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, BR.L, F1_SUB, F2_SUB); +} + + +static void SUB_A_n (Z80Context* ctx) +{ + BR.A = doArithmetic(ctx, read8(ctx, ctx->PC++), F1_SUB, F2_SUB); +} + + +static void XOR_off_HL (Z80Context* ctx) +{ + doXOR(ctx, read8(ctx, WR.HL)); +} + + +static void XOR_off_IX_d (Z80Context* ctx) +{ + ctx->tstates += 5; + doXOR(ctx, read8(ctx, WR.IX + (signed char) read8(ctx, ctx->PC++))); +} + + +static void XOR_off_IY_d (Z80Context* ctx) +{ + ctx->tstates += 5; + doXOR(ctx, read8(ctx, WR.IY + (signed char) read8(ctx, ctx->PC++))); +} + + +static void XOR_A (Z80Context* ctx) +{ + doXOR(ctx, BR.A); +} + + +static void XOR_B (Z80Context* ctx) +{ + doXOR(ctx, BR.B); +} + + +static void XOR_C (Z80Context* ctx) +{ + doXOR(ctx, BR.C); +} + + +static void XOR_D (Z80Context* ctx) +{ + doXOR(ctx, BR.D); +} + + +static void XOR_E (Z80Context* ctx) +{ + doXOR(ctx, BR.E); +} + + +static void XOR_H (Z80Context* ctx) +{ + doXOR(ctx, BR.H); +} + + +static void XOR_IXh (Z80Context* ctx) +{ + doXOR(ctx, BR.IXh); +} + + +static void XOR_IXl (Z80Context* ctx) +{ + doXOR(ctx, BR.IXl); +} + + +static void XOR_IYh (Z80Context* ctx) +{ + doXOR(ctx, BR.IYh); +} + + +static void XOR_IYl (Z80Context* ctx) +{ + doXOR(ctx, BR.IYl); +} + + +static void XOR_L (Z80Context* ctx) +{ + doXOR(ctx, BR.L); +} + + +static void XOR_n (Z80Context* ctx) +{ + doXOR(ctx, read8(ctx, ctx->PC++)); +} + + diff --git a/emul/opcodes_table.h b/emul/opcodes_table.h new file mode 100644 index 0000000..ab561a1 --- /dev/null +++ b/emul/opcodes_table.h @@ -0,0 +1,1830 @@ +// Generated by libz80 +static struct Z80OpcodeTable opcodes_main; +static struct Z80OpcodeTable opcodes_DD; +static struct Z80OpcodeTable opcodes_FD; +static struct Z80OpcodeTable opcodes_ED; +static struct Z80OpcodeTable opcodes_CB; +static struct Z80OpcodeTable opcodes_DDCB; +static struct Z80OpcodeTable opcodes_FDCB; + + +static struct Z80OpcodeTable opcodes_main = { 0, { + { NOP , OP_NONE , "NOP" , NULL }, + { LD_BC_nn , OP_WORD , "LD BC,0%04Xh" , NULL }, + { LD_off_BC_A , OP_NONE , "LD (BC),A" , NULL }, + { INC_BC , OP_NONE , "INC BC" , NULL }, + { INC_B , OP_NONE , "INC B" , NULL }, + { DEC_B , OP_NONE , "DEC B" , NULL }, + { LD_B_n , OP_BYTE , "LD B,0%02Xh" , NULL }, + { RLCA , OP_NONE , "RLCA" , NULL }, + { EX_AF_AF_ , OP_NONE , "EX AF,AF'" , NULL }, + { ADD_HL_BC , OP_NONE , "ADD HL,BC" , NULL }, + { LD_A_off_BC , OP_NONE , "LD A,(BC)" , NULL }, + { DEC_BC , OP_NONE , "DEC BC" , NULL }, + { INC_C , OP_NONE , "INC C" , NULL }, + { DEC_C , OP_NONE , "DEC C" , NULL }, + { LD_C_n , OP_BYTE , "LD C,0%02Xh" , NULL }, + { RRCA , OP_NONE , "RRCA" , NULL }, + { DJNZ_off_PC_e , OP_OFFSET, "DJNZ (PC+%d)" , NULL }, + { LD_DE_nn , OP_WORD , "LD DE,0%04Xh" , NULL }, + { LD_off_DE_A , OP_NONE , "LD (DE),A" , NULL }, + { INC_DE , OP_NONE , "INC DE" , NULL }, + { INC_D , OP_NONE , "INC D" , NULL }, + { DEC_D , OP_NONE , "DEC D" , NULL }, + { LD_D_n , OP_BYTE , "LD D,0%02Xh" , NULL }, + { RLA , OP_NONE , "RLA" , NULL }, + { JR_off_PC_e , OP_OFFSET, "JR (PC+%d)" , NULL }, + { ADD_HL_DE , OP_NONE , "ADD HL,DE" , NULL }, + { LD_A_off_DE , OP_NONE , "LD A,(DE)" , NULL }, + { DEC_DE , OP_NONE , "DEC DE" , NULL }, + { INC_E , OP_NONE , "INC E" , NULL }, + { DEC_E , OP_NONE , "DEC E" , NULL }, + { LD_E_n , OP_BYTE , "LD E,0%02Xh" , NULL }, + { RRA , OP_NONE , "RRA" , NULL }, + { JR_NZ_off_PC_e , OP_OFFSET, "JR NZ,(PC+%d)" , NULL }, + { LD_HL_nn , OP_WORD , "LD HL,0%04Xh" , NULL }, + { LD_off_nn_HL , OP_WORD , "LD (0%04Xh),HL" , NULL }, + { INC_HL , OP_NONE , "INC HL" , NULL }, + { INC_H , OP_NONE , "INC H" , NULL }, + { DEC_H , OP_NONE , "DEC H" , NULL }, + { LD_H_n , OP_BYTE , "LD H,0%02Xh" , NULL }, + { DAA , OP_NONE , "DAA" , NULL }, + { JR_Z_off_PC_e , OP_OFFSET, "JR Z,(PC+%d)" , NULL }, + { ADD_HL_HL , OP_NONE , "ADD HL,HL" , NULL }, + { LD_HL_off_nn , OP_WORD , "LD HL,(0%04Xh)" , NULL }, + { DEC_HL , OP_NONE , "DEC HL" , NULL }, + { INC_L , OP_NONE , "INC L" , NULL }, + { DEC_L , OP_NONE , "DEC L" , NULL }, + { LD_L_n , OP_BYTE , "LD L,0%02Xh" , NULL }, + { CPL , OP_NONE , "CPL" , NULL }, + { JR_NC_off_PC_e , OP_OFFSET, "JR NC,(PC+%d)" , NULL }, + { LD_SP_nn , OP_WORD , "LD SP,0%04Xh" , NULL }, + { LD_off_nn_A , OP_WORD , "LD (0%04Xh),A" , NULL }, + { INC_SP , OP_NONE , "INC SP" , NULL }, + { INC_off_HL , OP_NONE , "INC (HL)" , NULL }, + { DEC_off_HL , OP_NONE , "DEC (HL)" , NULL }, + { LD_off_HL_n , OP_BYTE , "LD (HL),0%02Xh" , NULL }, + { SCF , OP_NONE , "SCF" , NULL }, + { JR_C_off_PC_e , OP_OFFSET, "JR C,(PC+%d)" , NULL }, + { ADD_HL_SP , OP_NONE , "ADD HL,SP" , NULL }, + { LD_A_off_nn , OP_WORD , "LD A,(0%04Xh)" , NULL }, + { DEC_SP , OP_NONE , "DEC SP" , NULL }, + { INC_A , OP_NONE , "INC A" , NULL }, + { DEC_A , OP_NONE , "DEC A" , NULL }, + { LD_A_n , OP_BYTE , "LD A,0%02Xh" , NULL }, + { CCF , OP_NONE , "CCF" , NULL }, + { LD_B_B , OP_NONE , "LD B,B" , NULL }, + { LD_B_C , OP_NONE , "LD B,C" , NULL }, + { LD_B_D , OP_NONE , "LD B,D" , NULL }, + { LD_B_E , OP_NONE , "LD B,E" , NULL }, + { LD_B_H , OP_NONE , "LD B,H" , NULL }, + { LD_B_L , OP_NONE , "LD B,L" , NULL }, + { LD_B_off_HL , OP_NONE , "LD B,(HL)" , NULL }, + { LD_B_A , OP_NONE , "LD B,A" , NULL }, + { LD_C_B , OP_NONE , "LD C,B" , NULL }, + { LD_C_C , OP_NONE , "LD C,C" , NULL }, + { LD_C_D , OP_NONE , "LD C,D" , NULL }, + { LD_C_E , OP_NONE , "LD C,E" , NULL }, + { LD_C_H , OP_NONE , "LD C,H" , NULL }, + { LD_C_L , OP_NONE , "LD C,L" , NULL }, + { LD_C_off_HL , OP_NONE , "LD C,(HL)" , NULL }, + { LD_C_A , OP_NONE , "LD C,A" , NULL }, + { LD_D_B , OP_NONE , "LD D,B" , NULL }, + { LD_D_C , OP_NONE , "LD D,C" , NULL }, + { LD_D_D , OP_NONE , "LD D,D" , NULL }, + { LD_D_E , OP_NONE , "LD D,E" , NULL }, + { LD_D_H , OP_NONE , "LD D,H" , NULL }, + { LD_D_L , OP_NONE , "LD D,L" , NULL }, + { LD_D_off_HL , OP_NONE , "LD D,(HL)" , NULL }, + { LD_D_A , OP_NONE , "LD D,A" , NULL }, + { LD_E_B , OP_NONE , "LD E,B" , NULL }, + { LD_E_C , OP_NONE , "LD E,C" , NULL }, + { LD_E_D , OP_NONE , "LD E,D" , NULL }, + { LD_E_E , OP_NONE , "LD E,E" , NULL }, + { LD_E_H , OP_NONE , "LD E,H" , NULL }, + { LD_E_L , OP_NONE , "LD E,L" , NULL }, + { LD_E_off_HL , OP_NONE , "LD E,(HL)" , NULL }, + { LD_E_A , OP_NONE , "LD E,A" , NULL }, + { LD_H_B , OP_NONE , "LD H,B" , NULL }, + { LD_H_C , OP_NONE , "LD H,C" , NULL }, + { LD_H_D , OP_NONE , "LD H,D" , NULL }, + { LD_H_E , OP_NONE , "LD H,E" , NULL }, + { LD_H_H , OP_NONE , "LD H,H" , NULL }, + { LD_H_L , OP_NONE , "LD H,L" , NULL }, + { LD_H_off_HL , OP_NONE , "LD H,(HL)" , NULL }, + { LD_H_A , OP_NONE , "LD H,A" , NULL }, + { LD_L_B , OP_NONE , "LD L,B" , NULL }, + { LD_L_C , OP_NONE , "LD L,C" , NULL }, + { LD_L_D , OP_NONE , "LD L,D" , NULL }, + { LD_L_E , OP_NONE , "LD L,E" , NULL }, + { LD_L_H , OP_NONE , "LD L,H" , NULL }, + { LD_L_L , OP_NONE , "LD L,L" , NULL }, + { LD_L_off_HL , OP_NONE , "LD L,(HL)" , NULL }, + { LD_L_A , OP_NONE , "LD L,A" , NULL }, + { LD_off_HL_B , OP_NONE , "LD (HL),B" , NULL }, + { LD_off_HL_C , OP_NONE , "LD (HL),C" , NULL }, + { LD_off_HL_D , OP_NONE , "LD (HL),D" , NULL }, + { LD_off_HL_E , OP_NONE , "LD (HL),E" , NULL }, + { LD_off_HL_H , OP_NONE , "LD (HL),H" , NULL }, + { LD_off_HL_L , OP_NONE , "LD (HL),L" , NULL }, + { HALT , OP_NONE , "HALT" , NULL }, + { LD_off_HL_A , OP_NONE , "LD (HL),A" , NULL }, + { LD_A_B , OP_NONE , "LD A,B" , NULL }, + { LD_A_C , OP_NONE , "LD A,C" , NULL }, + { LD_A_D , OP_NONE , "LD A,D" , NULL }, + { LD_A_E , OP_NONE , "LD A,E" , NULL }, + { LD_A_H , OP_NONE , "LD A,H" , NULL }, + { LD_A_L , OP_NONE , "LD A,L" , NULL }, + { LD_A_off_HL , OP_NONE , "LD A,(HL)" , NULL }, + { LD_A_A , OP_NONE , "LD A,A" , NULL }, + { ADD_A_B , OP_NONE , "ADD A,B" , NULL }, + { ADD_A_C , OP_NONE , "ADD A,C" , NULL }, + { ADD_A_D , OP_NONE , "ADD A,D" , NULL }, + { ADD_A_E , OP_NONE , "ADD A,E" , NULL }, + { ADD_A_H , OP_NONE , "ADD A,H" , NULL }, + { ADD_A_L , OP_NONE , "ADD A,L" , NULL }, + { ADD_A_off_HL , OP_NONE , "ADD A,(HL)" , NULL }, + { ADD_A_A , OP_NONE , "ADD A,A" , NULL }, + { ADC_A_B , OP_NONE , "ADC A,B" , NULL }, + { ADC_A_C , OP_NONE , "ADC A,C" , NULL }, + { ADC_A_D , OP_NONE , "ADC A,D" , NULL }, + { ADC_A_E , OP_NONE , "ADC A,E" , NULL }, + { ADC_A_H , OP_NONE , "ADC A,H" , NULL }, + { ADC_A_L , OP_NONE , "ADC A,L" , NULL }, + { ADC_A_off_HL , OP_NONE , "ADC A,(HL)" , NULL }, + { ADC_A_A , OP_NONE , "ADC A,A" , NULL }, + { SUB_A_B , OP_NONE , "SUB A,B" , NULL }, + { SUB_A_C , OP_NONE , "SUB A,C" , NULL }, + { SUB_A_D , OP_NONE , "SUB A,D" , NULL }, + { SUB_A_E , OP_NONE , "SUB A,E" , NULL }, + { SUB_A_H , OP_NONE , "SUB A,H" , NULL }, + { SUB_A_L , OP_NONE , "SUB A,L" , NULL }, + { SUB_A_off_HL , OP_NONE , "SUB A,(HL)" , NULL }, + { SUB_A_A , OP_NONE , "SUB A,A" , NULL }, + { SBC_A_B , OP_NONE , "SBC A,B" , NULL }, + { SBC_A_C , OP_NONE , "SBC A,C" , NULL }, + { SBC_A_D , OP_NONE , "SBC A,D" , NULL }, + { SBC_A_E , OP_NONE , "SBC A,E" , NULL }, + { SBC_A_H , OP_NONE , "SBC A,H" , NULL }, + { SBC_A_L , OP_NONE , "SBC A,L" , NULL }, + { SBC_A_off_HL , OP_NONE , "SBC A,(HL)" , NULL }, + { SBC_A_A , OP_NONE , "SBC A,A" , NULL }, + { AND_B , OP_NONE , "AND B" , NULL }, + { AND_C , OP_NONE , "AND C" , NULL }, + { AND_D , OP_NONE , "AND D" , NULL }, + { AND_E , OP_NONE , "AND E" , NULL }, + { AND_H , OP_NONE , "AND H" , NULL }, + { AND_L , OP_NONE , "AND L" , NULL }, + { AND_off_HL , OP_NONE , "AND (HL)" , NULL }, + { AND_A , OP_NONE , "AND A" , NULL }, + { XOR_B , OP_NONE , "XOR B" , NULL }, + { XOR_C , OP_NONE , "XOR C" , NULL }, + { XOR_D , OP_NONE , "XOR D" , NULL }, + { XOR_E , OP_NONE , "XOR E" , NULL }, + { XOR_H , OP_NONE , "XOR H" , NULL }, + { XOR_L , OP_NONE , "XOR L" , NULL }, + { XOR_off_HL , OP_NONE , "XOR (HL)" , NULL }, + { XOR_A , OP_NONE , "XOR A" , NULL }, + { OR_B , OP_NONE , "OR B" , NULL }, + { OR_C , OP_NONE , "OR C" , NULL }, + { OR_D , OP_NONE , "OR D" , NULL }, + { OR_E , OP_NONE , "OR E" , NULL }, + { OR_H , OP_NONE , "OR H" , NULL }, + { OR_L , OP_NONE , "OR L" , NULL }, + { OR_off_HL , OP_NONE , "OR (HL)" , NULL }, + { OR_A , OP_NONE , "OR A" , NULL }, + { CP_B , OP_NONE , "CP B" , NULL }, + { CP_C , OP_NONE , "CP C" , NULL }, + { CP_D , OP_NONE , "CP D" , NULL }, + { CP_E , OP_NONE , "CP E" , NULL }, + { CP_H , OP_NONE , "CP H" , NULL }, + { CP_L , OP_NONE , "CP L" , NULL }, + { CP_off_HL , OP_NONE , "CP (HL)" , NULL }, + { CP_A , OP_NONE , "CP A" , NULL }, + { RET_NZ , OP_NONE , "RET NZ" , NULL }, + { POP_BC , OP_NONE , "POP BC" , NULL }, + { JP_NZ_off_nn , OP_WORD , "JP NZ,(0%04Xh)" , NULL }, + { JP_off_nn , OP_WORD , "JP (0%04Xh)" , NULL }, + { CALL_NZ_off_nn , OP_WORD , "CALL NZ,(0%04Xh)" , NULL }, + { PUSH_BC , OP_NONE , "PUSH BC" , NULL }, + { ADD_A_n , OP_BYTE , "ADD A,0%02Xh" , NULL }, + { RST_0H , OP_NONE , "RST 0H" , NULL }, + { RET_Z , OP_NONE , "RET Z" , NULL }, + { RET , OP_NONE , "RET" , NULL }, + { JP_Z_off_nn , OP_WORD , "JP Z,(0%04Xh)" , NULL }, + { NULL , OP_NONE , NULL , &opcodes_CB }, + { CALL_Z_off_nn , OP_WORD , "CALL Z,(0%04Xh)" , NULL }, + { CALL_off_nn , OP_WORD , "CALL (0%04Xh)" , NULL }, + { ADC_A_n , OP_BYTE , "ADC A,0%02Xh" , NULL }, + { RST_8H , OP_NONE , "RST 8H" , NULL }, + { RET_NC , OP_NONE , "RET NC" , NULL }, + { POP_DE , OP_NONE , "POP DE" , NULL }, + { JP_NC_off_nn , OP_WORD , "JP NC,(0%04Xh)" , NULL }, + { OUT_off_n_A , OP_BYTE , "OUT (0%02Xh),A" , NULL }, + { CALL_NC_off_nn , OP_WORD , "CALL NC,(0%04Xh)" , NULL }, + { PUSH_DE , OP_NONE , "PUSH DE" , NULL }, + { SUB_A_n , OP_BYTE , "SUB A,0%02Xh" , NULL }, + { RST_10H , OP_NONE , "RST 10H" , NULL }, + { RET_C , OP_NONE , "RET C" , NULL }, + { EXX , OP_NONE , "EXX" , NULL }, + { JP_C_off_nn , OP_WORD , "JP C,(0%04Xh)" , NULL }, + { IN_A_off_n , OP_BYTE , "IN A,(0%02Xh)" , NULL }, + { CALL_C_off_nn , OP_WORD , "CALL C,(0%04Xh)" , NULL }, + { NULL , OP_NONE , NULL , &opcodes_DD }, + { SBC_A_n , OP_BYTE , "SBC A,0%02Xh" , NULL }, + { RST_18H , OP_NONE , "RST 18H" , NULL }, + { RET_PO , OP_NONE , "RET PO" , NULL }, + { POP_HL , OP_NONE , "POP HL" , NULL }, + { JP_PO_off_nn , OP_WORD , "JP PO,(0%04Xh)" , NULL }, + { EX_off_SP_HL , OP_NONE , "EX (SP),HL" , NULL }, + { CALL_PO_off_nn , OP_WORD , "CALL PO,(0%04Xh)" , NULL }, + { PUSH_HL , OP_NONE , "PUSH HL" , NULL }, + { AND_n , OP_BYTE , "AND 0%02Xh" , NULL }, + { RST_20H , OP_NONE , "RST 20H" , NULL }, + { RET_PE , OP_NONE , "RET PE" , NULL }, + { JP_off_HL , OP_NONE , "JP (HL)" , NULL }, + { JP_PE_off_nn , OP_WORD , "JP PE,(0%04Xh)" , NULL }, + { EX_DE_HL , OP_NONE , "EX DE,HL" , NULL }, + { CALL_PE_off_nn , OP_WORD , "CALL PE,(0%04Xh)" , NULL }, + { NULL , OP_NONE , NULL , &opcodes_ED }, + { XOR_n , OP_BYTE , "XOR 0%02Xh" , NULL }, + { RST_28H , OP_NONE , "RST 28H" , NULL }, + { RET_P , OP_NONE , "RET P" , NULL }, + { POP_AF , OP_NONE , "POP AF" , NULL }, + { JP_P_off_nn , OP_WORD , "JP P,(0%04Xh)" , NULL }, + { DI , OP_NONE , "DI" , NULL }, + { CALL_P_off_nn , OP_WORD , "CALL P,(0%04Xh)" , NULL }, + { PUSH_AF , OP_NONE , "PUSH AF" , NULL }, + { OR_n , OP_BYTE , "OR 0%02Xh" , NULL }, + { RST_30H , OP_NONE , "RST 30H" , NULL }, + { RET_M , OP_NONE , "RET M" , NULL }, + { LD_SP_HL , OP_NONE , "LD SP,HL" , NULL }, + { JP_M_off_nn , OP_WORD , "JP M,(0%04Xh)" , NULL }, + { EI , OP_NONE , "EI" , NULL }, + { CALL_M_off_nn , OP_WORD , "CALL M,(0%04Xh)" , NULL }, + { NULL , OP_NONE , NULL , &opcodes_FD }, + { CP_n , OP_BYTE , "CP 0%02Xh" , NULL }, + { RST_38H , OP_NONE , "RST 38H" , NULL } +} }; + + +static struct Z80OpcodeTable opcodes_CB = { 0, { + { RLC_B , OP_NONE , "RLC B" , NULL }, + { RLC_C , OP_NONE , "RLC C" , NULL }, + { RLC_D , OP_NONE , "RLC D" , NULL }, + { RLC_E , OP_NONE , "RLC E" , NULL }, + { RLC_H , OP_NONE , "RLC H" , NULL }, + { RLC_L , OP_NONE , "RLC L" , NULL }, + { RLC_off_HL , OP_NONE , "RLC (HL)" , NULL }, + { RLC_A , OP_NONE , "RLC A" , NULL }, + { RRC_B , OP_NONE , "RRC B" , NULL }, + { RRC_C , OP_NONE , "RRC C" , NULL }, + { RRC_D , OP_NONE , "RRC D" , NULL }, + { RRC_E , OP_NONE , "RRC E" , NULL }, + { RRC_H , OP_NONE , "RRC H" , NULL }, + { RRC_L , OP_NONE , "RRC L" , NULL }, + { RRC_off_HL , OP_NONE , "RRC (HL)" , NULL }, + { RRC_A , OP_NONE , "RRC A" , NULL }, + { RL_B , OP_NONE , "RL B" , NULL }, + { RL_C , OP_NONE , "RL C" , NULL }, + { RL_D , OP_NONE , "RL D" , NULL }, + { RL_E , OP_NONE , "RL E" , NULL }, + { RL_H , OP_NONE , "RL H" , NULL }, + { RL_L , OP_NONE , "RL L" , NULL }, + { RL_off_HL , OP_NONE , "RL (HL)" , NULL }, + { RL_A , OP_NONE , "RL A" , NULL }, + { RR_B , OP_NONE , "RR B" , NULL }, + { RR_C , OP_NONE , "RR C" , NULL }, + { RR_D , OP_NONE , "RR D" , NULL }, + { RR_E , OP_NONE , "RR E" , NULL }, + { RR_H , OP_NONE , "RR H" , NULL }, + { RR_L , OP_NONE , "RR L" , NULL }, + { RR_off_HL , OP_NONE , "RR (HL)" , NULL }, + { RR_A , OP_NONE , "RR A" , NULL }, + { SLA_B , OP_NONE , "SLA B" , NULL }, + { SLA_C , OP_NONE , "SLA C" , NULL }, + { SLA_D , OP_NONE , "SLA D" , NULL }, + { SLA_E , OP_NONE , "SLA E" , NULL }, + { SLA_H , OP_NONE , "SLA H" , NULL }, + { SLA_L , OP_NONE , "SLA L" , NULL }, + { SLA_off_HL , OP_NONE , "SLA (HL)" , NULL }, + { SLA_A , OP_NONE , "SLA A" , NULL }, + { SRA_B , OP_NONE , "SRA B" , NULL }, + { SRA_C , OP_NONE , "SRA C" , NULL }, + { SRA_D , OP_NONE , "SRA D" , NULL }, + { SRA_E , OP_NONE , "SRA E" , NULL }, + { SRA_H , OP_NONE , "SRA H" , NULL }, + { SRA_L , OP_NONE , "SRA L" , NULL }, + { SRA_off_HL , OP_NONE , "SRA (HL)" , NULL }, + { SRA_A , OP_NONE , "SRA A" , NULL }, + { SLL_B , OP_NONE , "SLL B" , NULL }, + { SLL_C , OP_NONE , "SLL C" , NULL }, + { SLL_D , OP_NONE , "SLL D" , NULL }, + { SLL_E , OP_NONE , "SLL E" , NULL }, + { SLL_H , OP_NONE , "SLL H" , NULL }, + { SLL_L , OP_NONE , "SLL L" , NULL }, + { SLL_off_HL , OP_NONE , "SLL (HL)" , NULL }, + { SLL_A , OP_NONE , "SLL A" , NULL }, + { SRL_B , OP_NONE , "SRL B" , NULL }, + { SRL_C , OP_NONE , "SRL C" , NULL }, + { SRL_D , OP_NONE , "SRL D" , NULL }, + { SRL_E , OP_NONE , "SRL E" , NULL }, + { SRL_H , OP_NONE , "SRL H" , NULL }, + { SRL_L , OP_NONE , "SRL L" , NULL }, + { SRL_off_HL , OP_NONE , "SRL (HL)" , NULL }, + { SRL_A , OP_NONE , "SRL A" , NULL }, + { BIT_0_B , OP_NONE , "BIT 0,B" , NULL }, + { BIT_0_C , OP_NONE , "BIT 0,C" , NULL }, + { BIT_0_D , OP_NONE , "BIT 0,D" , NULL }, + { BIT_0_E , OP_NONE , "BIT 0,E" , NULL }, + { BIT_0_H , OP_NONE , "BIT 0,H" , NULL }, + { BIT_0_L , OP_NONE , "BIT 0,L" , NULL }, + { BIT_0_off_HL , OP_NONE , "BIT 0,(HL)" , NULL }, + { BIT_0_A , OP_NONE , "BIT 0,A" , NULL }, + { BIT_1_B , OP_NONE , "BIT 1,B" , NULL }, + { BIT_1_C , OP_NONE , "BIT 1,C" , NULL }, + { BIT_1_D , OP_NONE , "BIT 1,D" , NULL }, + { BIT_1_E , OP_NONE , "BIT 1,E" , NULL }, + { BIT_1_H , OP_NONE , "BIT 1,H" , NULL }, + { BIT_1_L , OP_NONE , "BIT 1,L" , NULL }, + { BIT_1_off_HL , OP_NONE , "BIT 1,(HL)" , NULL }, + { BIT_1_A , OP_NONE , "BIT 1,A" , NULL }, + { BIT_2_B , OP_NONE , "BIT 2,B" , NULL }, + { BIT_2_C , OP_NONE , "BIT 2,C" , NULL }, + { BIT_2_D , OP_NONE , "BIT 2,D" , NULL }, + { BIT_2_E , OP_NONE , "BIT 2,E" , NULL }, + { BIT_2_H , OP_NONE , "BIT 2,H" , NULL }, + { BIT_2_L , OP_NONE , "BIT 2,L" , NULL }, + { BIT_2_off_HL , OP_NONE , "BIT 2,(HL)" , NULL }, + { BIT_2_A , OP_NONE , "BIT 2,A" , NULL }, + { BIT_3_B , OP_NONE , "BIT 3,B" , NULL }, + { BIT_3_C , OP_NONE , "BIT 3,C" , NULL }, + { BIT_3_D , OP_NONE , "BIT 3,D" , NULL }, + { BIT_3_E , OP_NONE , "BIT 3,E" , NULL }, + { BIT_3_H , OP_NONE , "BIT 3,H" , NULL }, + { BIT_3_L , OP_NONE , "BIT 3,L" , NULL }, + { BIT_3_off_HL , OP_NONE , "BIT 3,(HL)" , NULL }, + { BIT_3_A , OP_NONE , "BIT 3,A" , NULL }, + { BIT_4_B , OP_NONE , "BIT 4,B" , NULL }, + { BIT_4_C , OP_NONE , "BIT 4,C" , NULL }, + { BIT_4_D , OP_NONE , "BIT 4,D" , NULL }, + { BIT_4_E , OP_NONE , "BIT 4,E" , NULL }, + { BIT_4_H , OP_NONE , "BIT 4,H" , NULL }, + { BIT_4_L , OP_NONE , "BIT 4,L" , NULL }, + { BIT_4_off_HL , OP_NONE , "BIT 4,(HL)" , NULL }, + { BIT_4_A , OP_NONE , "BIT 4,A" , NULL }, + { BIT_5_B , OP_NONE , "BIT 5,B" , NULL }, + { BIT_5_C , OP_NONE , "BIT 5,C" , NULL }, + { BIT_5_D , OP_NONE , "BIT 5,D" , NULL }, + { BIT_5_E , OP_NONE , "BIT 5,E" , NULL }, + { BIT_5_H , OP_NONE , "BIT 5,H" , NULL }, + { BIT_5_L , OP_NONE , "BIT 5,L" , NULL }, + { BIT_5_off_HL , OP_NONE , "BIT 5,(HL)" , NULL }, + { BIT_5_A , OP_NONE , "BIT 5,A" , NULL }, + { BIT_6_B , OP_NONE , "BIT 6,B" , NULL }, + { BIT_6_C , OP_NONE , "BIT 6,C" , NULL }, + { BIT_6_D , OP_NONE , "BIT 6,D" , NULL }, + { BIT_6_E , OP_NONE , "BIT 6,E" , NULL }, + { BIT_6_H , OP_NONE , "BIT 6,H" , NULL }, + { BIT_6_L , OP_NONE , "BIT 6,L" , NULL }, + { BIT_6_off_HL , OP_NONE , "BIT 6,(HL)" , NULL }, + { BIT_6_A , OP_NONE , "BIT 6,A" , NULL }, + { BIT_7_B , OP_NONE , "BIT 7,B" , NULL }, + { BIT_7_C , OP_NONE , "BIT 7,C" , NULL }, + { BIT_7_D , OP_NONE , "BIT 7,D" , NULL }, + { BIT_7_E , OP_NONE , "BIT 7,E" , NULL }, + { BIT_7_H , OP_NONE , "BIT 7,H" , NULL }, + { BIT_7_L , OP_NONE , "BIT 7,L" , NULL }, + { BIT_7_off_HL , OP_NONE , "BIT 7,(HL)" , NULL }, + { BIT_7_A , OP_NONE , "BIT 7,A" , NULL }, + { RES_0_B , OP_NONE , "RES 0,B" , NULL }, + { RES_0_C , OP_NONE , "RES 0,C" , NULL }, + { RES_0_D , OP_NONE , "RES 0,D" , NULL }, + { RES_0_E , OP_NONE , "RES 0,E" , NULL }, + { RES_0_H , OP_NONE , "RES 0,H" , NULL }, + { RES_0_L , OP_NONE , "RES 0,L" , NULL }, + { RES_0_off_HL , OP_NONE , "RES 0,(HL)" , NULL }, + { RES_0_A , OP_NONE , "RES 0,A" , NULL }, + { RES_1_B , OP_NONE , "RES 1,B" , NULL }, + { RES_1_C , OP_NONE , "RES 1,C" , NULL }, + { RES_1_D , OP_NONE , "RES 1,D" , NULL }, + { RES_1_E , OP_NONE , "RES 1,E" , NULL }, + { RES_1_H , OP_NONE , "RES 1,H" , NULL }, + { RES_1_L , OP_NONE , "RES 1,L" , NULL }, + { RES_1_off_HL , OP_NONE , "RES 1,(HL)" , NULL }, + { RES_1_A , OP_NONE , "RES 1,A" , NULL }, + { RES_2_B , OP_NONE , "RES 2,B" , NULL }, + { RES_2_C , OP_NONE , "RES 2,C" , NULL }, + { RES_2_D , OP_NONE , "RES 2,D" , NULL }, + { RES_2_E , OP_NONE , "RES 2,E" , NULL }, + { RES_2_H , OP_NONE , "RES 2,H" , NULL }, + { RES_2_L , OP_NONE , "RES 2,L" , NULL }, + { RES_2_off_HL , OP_NONE , "RES 2,(HL)" , NULL }, + { RES_2_A , OP_NONE , "RES 2,A" , NULL }, + { RES_3_B , OP_NONE , "RES 3,B" , NULL }, + { RES_3_C , OP_NONE , "RES 3,C" , NULL }, + { RES_3_D , OP_NONE , "RES 3,D" , NULL }, + { RES_3_E , OP_NONE , "RES 3,E" , NULL }, + { RES_3_H , OP_NONE , "RES 3,H" , NULL }, + { RES_3_L , OP_NONE , "RES 3,L" , NULL }, + { RES_3_off_HL , OP_NONE , "RES 3,(HL)" , NULL }, + { RES_3_A , OP_NONE , "RES 3,A" , NULL }, + { RES_4_B , OP_NONE , "RES 4,B" , NULL }, + { RES_4_C , OP_NONE , "RES 4,C" , NULL }, + { RES_4_D , OP_NONE , "RES 4,D" , NULL }, + { RES_4_E , OP_NONE , "RES 4,E" , NULL }, + { RES_4_H , OP_NONE , "RES 4,H" , NULL }, + { RES_4_L , OP_NONE , "RES 4,L" , NULL }, + { RES_4_off_HL , OP_NONE , "RES 4,(HL)" , NULL }, + { RES_4_A , OP_NONE , "RES 4,A" , NULL }, + { RES_5_B , OP_NONE , "RES 5,B" , NULL }, + { RES_5_C , OP_NONE , "RES 5,C" , NULL }, + { RES_5_D , OP_NONE , "RES 5,D" , NULL }, + { RES_5_E , OP_NONE , "RES 5,E" , NULL }, + { RES_5_H , OP_NONE , "RES 5,H" , NULL }, + { RES_5_L , OP_NONE , "RES 5,L" , NULL }, + { RES_5_off_HL , OP_NONE , "RES 5,(HL)" , NULL }, + { RES_5_A , OP_NONE , "RES 5,A" , NULL }, + { RES_6_B , OP_NONE , "RES 6,B" , NULL }, + { RES_6_C , OP_NONE , "RES 6,C" , NULL }, + { RES_6_D , OP_NONE , "RES 6,D" , NULL }, + { RES_6_E , OP_NONE , "RES 6,E" , NULL }, + { RES_6_H , OP_NONE , "RES 6,H" , NULL }, + { RES_6_L , OP_NONE , "RES 6,L" , NULL }, + { RES_6_off_HL , OP_NONE , "RES 6,(HL)" , NULL }, + { RES_6_A , OP_NONE , "RES 6,A" , NULL }, + { RES_7_B , OP_NONE , "RES 7,B" , NULL }, + { RES_7_C , OP_NONE , "RES 7,C" , NULL }, + { RES_7_D , OP_NONE , "RES 7,D" , NULL }, + { RES_7_E , OP_NONE , "RES 7,E" , NULL }, + { RES_7_H , OP_NONE , "RES 7,H" , NULL }, + { RES_7_L , OP_NONE , "RES 7,L" , NULL }, + { RES_7_off_HL , OP_NONE , "RES 7,(HL)" , NULL }, + { RES_7_A , OP_NONE , "RES 7,A" , NULL }, + { SET_0_B , OP_NONE , "SET 0,B" , NULL }, + { SET_0_C , OP_NONE , "SET 0,C" , NULL }, + { SET_0_D , OP_NONE , "SET 0,D" , NULL }, + { SET_0_E , OP_NONE , "SET 0,E" , NULL }, + { SET_0_H , OP_NONE , "SET 0,H" , NULL }, + { SET_0_L , OP_NONE , "SET 0,L" , NULL }, + { SET_0_off_HL , OP_NONE , "SET 0,(HL)" , NULL }, + { SET_0_A , OP_NONE , "SET 0,A" , NULL }, + { SET_1_B , OP_NONE , "SET 1,B" , NULL }, + { SET_1_C , OP_NONE , "SET 1,C" , NULL }, + { SET_1_D , OP_NONE , "SET 1,D" , NULL }, + { SET_1_E , OP_NONE , "SET 1,E" , NULL }, + { SET_1_H , OP_NONE , "SET 1,H" , NULL }, + { SET_1_L , OP_NONE , "SET 1,L" , NULL }, + { SET_1_off_HL , OP_NONE , "SET 1,(HL)" , NULL }, + { SET_1_A , OP_NONE , "SET 1,A" , NULL }, + { SET_2_B , OP_NONE , "SET 2,B" , NULL }, + { SET_2_C , OP_NONE , "SET 2,C" , NULL }, + { SET_2_D , OP_NONE , "SET 2,D" , NULL }, + { SET_2_E , OP_NONE , "SET 2,E" , NULL }, + { SET_2_H , OP_NONE , "SET 2,H" , NULL }, + { SET_2_L , OP_NONE , "SET 2,L" , NULL }, + { SET_2_off_HL , OP_NONE , "SET 2,(HL)" , NULL }, + { SET_2_A , OP_NONE , "SET 2,A" , NULL }, + { SET_3_B , OP_NONE , "SET 3,B" , NULL }, + { SET_3_C , OP_NONE , "SET 3,C" , NULL }, + { SET_3_D , OP_NONE , "SET 3,D" , NULL }, + { SET_3_E , OP_NONE , "SET 3,E" , NULL }, + { SET_3_H , OP_NONE , "SET 3,H" , NULL }, + { SET_3_L , OP_NONE , "SET 3,L" , NULL }, + { SET_3_off_HL , OP_NONE , "SET 3,(HL)" , NULL }, + { SET_3_A , OP_NONE , "SET 3,A" , NULL }, + { SET_4_B , OP_NONE , "SET 4,B" , NULL }, + { SET_4_C , OP_NONE , "SET 4,C" , NULL }, + { SET_4_D , OP_NONE , "SET 4,D" , NULL }, + { SET_4_E , OP_NONE , "SET 4,E" , NULL }, + { SET_4_H , OP_NONE , "SET 4,H" , NULL }, + { SET_4_L , OP_NONE , "SET 4,L" , NULL }, + { SET_4_off_HL , OP_NONE , "SET 4,(HL)" , NULL }, + { SET_4_A , OP_NONE , "SET 4,A" , NULL }, + { SET_5_B , OP_NONE , "SET 5,B" , NULL }, + { SET_5_C , OP_NONE , "SET 5,C" , NULL }, + { SET_5_D , OP_NONE , "SET 5,D" , NULL }, + { SET_5_E , OP_NONE , "SET 5,E" , NULL }, + { SET_5_H , OP_NONE , "SET 5,H" , NULL }, + { SET_5_L , OP_NONE , "SET 5,L" , NULL }, + { SET_5_off_HL , OP_NONE , "SET 5,(HL)" , NULL }, + { SET_5_A , OP_NONE , "SET 5,A" , NULL }, + { SET_6_B , OP_NONE , "SET 6,B" , NULL }, + { SET_6_C , OP_NONE , "SET 6,C" , NULL }, + { SET_6_D , OP_NONE , "SET 6,D" , NULL }, + { SET_6_E , OP_NONE , "SET 6,E" , NULL }, + { SET_6_H , OP_NONE , "SET 6,H" , NULL }, + { SET_6_L , OP_NONE , "SET 6,L" , NULL }, + { SET_6_off_HL , OP_NONE , "SET 6,(HL)" , NULL }, + { SET_6_A , OP_NONE , "SET 6,A" , NULL }, + { SET_7_B , OP_NONE , "SET 7,B" , NULL }, + { SET_7_C , OP_NONE , "SET 7,C" , NULL }, + { SET_7_D , OP_NONE , "SET 7,D" , NULL }, + { SET_7_E , OP_NONE , "SET 7,E" , NULL }, + { SET_7_H , OP_NONE , "SET 7,H" , NULL }, + { SET_7_L , OP_NONE , "SET 7,L" , NULL }, + { SET_7_off_HL , OP_NONE , "SET 7,(HL)" , NULL }, + { SET_7_A , OP_NONE , "SET 7,A" , NULL } +} }; + + +static struct Z80OpcodeTable opcodes_DD = { 0, { + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IX_BC , OP_NONE , "ADD IX,BC" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IX_DE , OP_NONE , "ADD IX,DE" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_IX_nn , OP_WORD , "LD IX,0%04Xh" , NULL }, + { LD_off_nn_IX , OP_WORD , "LD (0%04Xh),IX" , NULL }, + { INC_IX , OP_NONE , "INC IX" , NULL }, + { INC_IXh , OP_NONE , "INC IXh" , NULL }, + { DEC_IXh , OP_NONE , "DEC IXh" , NULL }, + { LD_IXh_n , OP_BYTE , "LD IXh,0%02Xh" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IX_IX , OP_NONE , "ADD IX,IX" , NULL }, + { LD_IX_off_nn , OP_WORD , "LD IX,(0%04Xh)" , NULL }, + { DEC_IX , OP_NONE , "DEC IX" , NULL }, + { INC_IXl , OP_NONE , "INC IXl" , NULL }, + { DEC_IXl , OP_NONE , "DEC IXl" , NULL }, + { LD_IXl_n , OP_BYTE , "LD IXl,0%02Xh" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { INC_off_IX_d , OP_BYTE , "INC (IX+0%02Xh)" , NULL }, + { DEC_off_IX_d , OP_BYTE , "DEC (IX+0%02Xh)" , NULL }, + { LD_off_IX_d_n , OP_BYTE , "LD (IX+0%02Xh),0%02Xh", NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IX_SP , OP_NONE , "ADD IX,SP" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_B_IXh , OP_NONE , "LD B,IXh" , NULL }, + { LD_B_IXl , OP_NONE , "LD B,IXl" , NULL }, + { LD_B_off_IX_d , OP_BYTE , "LD B,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_C_IXh , OP_NONE , "LD C,IXh" , NULL }, + { LD_C_IXl , OP_NONE , "LD C,IXl" , NULL }, + { LD_C_off_IX_d , OP_BYTE , "LD C,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_D_IXh , OP_NONE , "LD D,IXh" , NULL }, + { LD_D_IXl , OP_NONE , "LD D,IXl" , NULL }, + { LD_D_off_IX_d , OP_BYTE , "LD D,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_E_IXh , OP_NONE , "LD E,IXh" , NULL }, + { LD_E_IXl , OP_NONE , "LD E,IXl" , NULL }, + { LD_E_off_IX_d , OP_BYTE , "LD E,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_IXh_B , OP_NONE , "LD IXh,B" , NULL }, + { LD_IXh_C , OP_NONE , "LD IXh,C" , NULL }, + { LD_IXh_D , OP_NONE , "LD IXh,D" , NULL }, + { LD_IXh_E , OP_NONE , "LD IXh,E" , NULL }, + { LD_IXh_IXh , OP_NONE , "LD IXh,IXh" , NULL }, + { LD_IXh_IXl , OP_NONE , "LD IXh,IXl" , NULL }, + { LD_H_off_IX_d , OP_BYTE , "LD H,(IX+0%02Xh)" , NULL }, + { LD_IXh_A , OP_NONE , "LD IXh,A" , NULL }, + { LD_IXl_B , OP_NONE , "LD IXl,B" , NULL }, + { LD_IXl_C , OP_NONE , "LD IXl,C" , NULL }, + { LD_IXl_D , OP_NONE , "LD IXl,D" , NULL }, + { LD_IXl_E , OP_NONE , "LD IXl,E" , NULL }, + { LD_IXl_IXh , OP_NONE , "LD IXl,IXh" , NULL }, + { LD_IXl_IXl , OP_NONE , "LD IXl,IXl" , NULL }, + { LD_L_off_IX_d , OP_BYTE , "LD L,(IX+0%02Xh)" , NULL }, + { LD_IXl_A , OP_NONE , "LD IXl,A" , NULL }, + { LD_off_IX_d_B , OP_BYTE , "LD (IX+0%02Xh),B" , NULL }, + { LD_off_IX_d_C , OP_BYTE , "LD (IX+0%02Xh),C" , NULL }, + { LD_off_IX_d_D , OP_BYTE , "LD (IX+0%02Xh),D" , NULL }, + { LD_off_IX_d_E , OP_BYTE , "LD (IX+0%02Xh),E" , NULL }, + { LD_off_IX_d_H , OP_BYTE , "LD (IX+0%02Xh),H" , NULL }, + { LD_off_IX_d_L , OP_BYTE , "LD (IX+0%02Xh),L" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_off_IX_d_A , OP_BYTE , "LD (IX+0%02Xh),A" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_A_IXh , OP_NONE , "LD A,IXh" , NULL }, + { LD_A_IXl , OP_NONE , "LD A,IXl" , NULL }, + { LD_A_off_IX_d , OP_BYTE , "LD A,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_A_IXh , OP_NONE , "ADD A,IXh" , NULL }, + { ADD_A_IXl , OP_NONE , "ADD A,IXl" , NULL }, + { ADD_A_off_IX_d , OP_BYTE , "ADD A,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADC_A_IXh , OP_NONE , "ADC A,IXh" , NULL }, + { ADC_A_IXl , OP_NONE , "ADC A,IXl" , NULL }, + { ADC_A_off_IX_d , OP_BYTE , "ADC A,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { SUB_A_IXh , OP_NONE , "SUB A,IXh" , NULL }, + { SUB_A_IXl , OP_NONE , "SUB A,IXl" , NULL }, + { SUB_A_off_IX_d , OP_BYTE , "SUB A,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { SBC_A_IXh , OP_NONE , "SBC A,IXh" , NULL }, + { SBC_A_IXl , OP_NONE , "SBC A,IXl" , NULL }, + { SBC_A_off_IX_d , OP_BYTE , "SBC A,(IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { AND_IXh , OP_NONE , "AND IXh" , NULL }, + { AND_IXl , OP_NONE , "AND IXl" , NULL }, + { AND_off_IX_d , OP_BYTE , "AND (IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { XOR_IXh , OP_NONE , "XOR IXh" , NULL }, + { XOR_IXl , OP_NONE , "XOR IXl" , NULL }, + { XOR_off_IX_d , OP_BYTE , "XOR (IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { OR_IXh , OP_NONE , "OR IXh" , NULL }, + { OR_IXl , OP_NONE , "OR IXl" , NULL }, + { OR_off_IX_d , OP_BYTE , "OR (IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { CP_IXh , OP_NONE , "CP IXh" , NULL }, + { CP_IXl , OP_NONE , "CP IXl" , NULL }, + { CP_off_IX_d , OP_BYTE , "CP (IX+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , &opcodes_DDCB }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { POP_IX , OP_NONE , "POP IX" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { EX_off_SP_IX , OP_NONE , "EX (SP),IX" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { PUSH_IX , OP_NONE , "PUSH IX" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { JP_off_IX , OP_NONE , "JP (IX)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_SP_IX , OP_NONE , "LD SP,IX" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL } +} }; + + +static struct Z80OpcodeTable opcodes_DDCB = { 1, { + { LD_B_RLC_off_IX_d , OP_BYTE , "LD B,RLC (IX+0%02Xh)", NULL }, + { LD_C_RLC_off_IX_d , OP_BYTE , "LD C,RLC (IX+0%02Xh)", NULL }, + { LD_D_RLC_off_IX_d , OP_BYTE , "LD D,RLC (IX+0%02Xh)", NULL }, + { LD_E_RLC_off_IX_d , OP_BYTE , "LD E,RLC (IX+0%02Xh)", NULL }, + { LD_H_RLC_off_IX_d , OP_BYTE , "LD H,RLC (IX+0%02Xh)", NULL }, + { LD_L_RLC_off_IX_d , OP_BYTE , "LD L,RLC (IX+0%02Xh)", NULL }, + { RLC_off_IX_d , OP_BYTE , "RLC (IX+0%02Xh)" , NULL }, + { LD_A_RLC_off_IX_d , OP_BYTE , "LD A,RLC (IX+0%02Xh)", NULL }, + { LD_B_RRC_off_IX_d , OP_BYTE , "LD B,RRC (IX+0%02Xh)", NULL }, + { LD_C_RRC_off_IX_d , OP_BYTE , "LD C,RRC (IX+0%02Xh)", NULL }, + { LD_D_RRC_off_IX_d , OP_BYTE , "LD D,RRC (IX+0%02Xh)", NULL }, + { LD_E_RRC_off_IX_d , OP_BYTE , "LD E,RRC (IX+0%02Xh)", NULL }, + { LD_H_RRC_off_IX_d , OP_BYTE , "LD H,RRC (IX+0%02Xh)", NULL }, + { LD_L_RRC_off_IX_d , OP_BYTE , "LD L,RRC (IX+0%02Xh)", NULL }, + { RRC_off_IX_d , OP_BYTE , "RRC (IX+0%02Xh)" , NULL }, + { LD_A_RRC_off_IX_d , OP_BYTE , "LD A,RRC (IX+0%02Xh)", NULL }, + { LD_B_RL_off_IX_d , OP_BYTE , "LD B,RL (IX+0%02Xh)", NULL }, + { LD_C_RL_off_IX_d , OP_BYTE , "LD C,RL (IX+0%02Xh)", NULL }, + { LD_D_RL_off_IX_d , OP_BYTE , "LD D,RL (IX+0%02Xh)", NULL }, + { LD_E_RL_off_IX_d , OP_BYTE , "LD E,RL (IX+0%02Xh)", NULL }, + { LD_H_RL_off_IX_d , OP_BYTE , "LD H,RL (IX+0%02Xh)", NULL }, + { LD_L_RL_off_IX_d , OP_BYTE , "LD L,RL (IX+0%02Xh)", NULL }, + { RL_off_IX_d , OP_BYTE , "RL (IX+0%02Xh)" , NULL }, + { LD_A_RL_off_IX_d , OP_BYTE , "LD A,RL (IX+0%02Xh)", NULL }, + { LD_B_RR_off_IX_d , OP_BYTE , "LD B,RR (IX+0%02Xh)", NULL }, + { LD_C_RR_off_IX_d , OP_BYTE , "LD C,RR (IX+0%02Xh)", NULL }, + { LD_D_RR_off_IX_d , OP_BYTE , "LD D,RR (IX+0%02Xh)", NULL }, + { LD_E_RR_off_IX_d , OP_BYTE , "LD E,RR (IX+0%02Xh)", NULL }, + { LD_H_RR_off_IX_d , OP_BYTE , "LD H,RR (IX+0%02Xh)", NULL }, + { LD_L_RR_off_IX_d , OP_BYTE , "LD L,RR (IX+0%02Xh)", NULL }, + { RR_off_IX_d , OP_BYTE , "RR (IX+0%02Xh)" , NULL }, + { LD_A_RR_off_IX_d , OP_BYTE , "LD A,RR (IX+0%02Xh)", NULL }, + { LD_B_SLA_off_IX_d , OP_BYTE , "LD B,SLA (IX+0%02Xh)", NULL }, + { LD_C_SLA_off_IX_d , OP_BYTE , "LD C,SLA (IX+0%02Xh)", NULL }, + { LD_D_SLA_off_IX_d , OP_BYTE , "LD D,SLA (IX+0%02Xh)", NULL }, + { LD_E_SLA_off_IX_d , OP_BYTE , "LD E,SLA (IX+0%02Xh)", NULL }, + { LD_H_SLA_off_IX_d , OP_BYTE , "LD H,SLA (IX+0%02Xh)", NULL }, + { LD_L_SLA_off_IX_d , OP_BYTE , "LD L,SLA (IX+0%02Xh)", NULL }, + { SLA_off_IX_d , OP_BYTE , "SLA (IX+0%02Xh)" , NULL }, + { LD_A_SLA_off_IX_d , OP_BYTE , "LD A,SLA (IX+0%02Xh)", NULL }, + { LD_B_SRA_off_IX_d , OP_BYTE , "LD B,SRA (IX+0%02Xh)", NULL }, + { LD_C_SRA_off_IX_d , OP_BYTE , "LD C,SRA (IX+0%02Xh)", NULL }, + { LD_D_SRA_off_IX_d , OP_BYTE , "LD D,SRA (IX+0%02Xh)", NULL }, + { LD_E_SRA_off_IX_d , OP_BYTE , "LD E,SRA (IX+0%02Xh)", NULL }, + { LD_H_SRA_off_IX_d , OP_BYTE , "LD H,SRA (IX+0%02Xh)", NULL }, + { LD_L_SRA_off_IX_d , OP_BYTE , "LD L,SRA (IX+0%02Xh)", NULL }, + { SRA_off_IX_d , OP_BYTE , "SRA (IX+0%02Xh)" , NULL }, + { LD_A_SRA_off_IX_d , OP_BYTE , "LD A,SRA (IX+0%02Xh)", NULL }, + { LD_B_SLL_off_IX_d , OP_BYTE , "LD B,SLL (IX+0%02Xh)", NULL }, + { LD_C_SLL_off_IX_d , OP_BYTE , "LD C,SLL (IX+0%02Xh)", NULL }, + { LD_D_SLL_off_IX_d , OP_BYTE , "LD D,SLL (IX+0%02Xh)", NULL }, + { LD_E_SLL_off_IX_d , OP_BYTE , "LD E,SLL (IX+0%02Xh)", NULL }, + { LD_H_SLL_off_IX_d , OP_BYTE , "LD H,SLL (IX+0%02Xh)", NULL }, + { LD_L_SLL_off_IX_d , OP_BYTE , "LD L,SLL (IX+0%02Xh)", NULL }, + { SLL_off_IX_d , OP_BYTE , "SLL (IX+0%02Xh)" , NULL }, + { LD_A_SLL_off_IX_d , OP_BYTE , "LD A,SLL (IX+0%02Xh)", NULL }, + { LD_B_SRL_off_IX_d , OP_BYTE , "LD B,SRL (IX+0%02Xh)", NULL }, + { LD_C_SRL_off_IX_d , OP_BYTE , "LD C,SRL (IX+0%02Xh)", NULL }, + { LD_D_SRL_off_IX_d , OP_BYTE , "LD D,SRL (IX+0%02Xh)", NULL }, + { LD_E_SRL_off_IX_d , OP_BYTE , "LD E,SRL (IX+0%02Xh)", NULL }, + { LD_H_SRL_off_IX_d , OP_BYTE , "LD H,SRL (IX+0%02Xh)", NULL }, + { LD_L_SRL_off_IX_d , OP_BYTE , "LD L,SRL (IX+0%02Xh)", NULL }, + { SRL_off_IX_d , OP_BYTE , "SRL (IX+0%02Xh)" , NULL }, + { LD_A_SRL_off_IX_d , OP_BYTE , "LD A,SRL (IX+0%02Xh)", NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_0_off_IX_d , OP_BYTE , "BIT 0,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_1_off_IX_d , OP_BYTE , "BIT 1,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_2_off_IX_d , OP_BYTE , "BIT 2,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_3_off_IX_d , OP_BYTE , "BIT 3,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_4_off_IX_d , OP_BYTE , "BIT 4,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_5_off_IX_d , OP_BYTE , "BIT 5,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_6_off_IX_d , OP_BYTE , "BIT 6,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { BIT_7_off_IX_d , OP_BYTE , "BIT 7,(IX+0%02Xh)" , NULL }, + { LD_B_RES_0_off_IX_d , OP_BYTE , "LD B,RES 0,(IX+0%02Xh)", NULL }, + { LD_C_RES_0_off_IX_d , OP_BYTE , "LD C,RES 0,(IX+0%02Xh)", NULL }, + { LD_D_RES_0_off_IX_d , OP_BYTE , "LD D,RES 0,(IX+0%02Xh)", NULL }, + { LD_E_RES_0_off_IX_d , OP_BYTE , "LD E,RES 0,(IX+0%02Xh)", NULL }, + { LD_H_RES_0_off_IX_d , OP_BYTE , "LD H,RES 0,(IX+0%02Xh)", NULL }, + { LD_L_RES_0_off_IX_d , OP_BYTE , "LD L,RES 0,(IX+0%02Xh)", NULL }, + { RES_0_off_IX_d , OP_BYTE , "RES 0,(IX+0%02Xh)" , NULL }, + { LD_A_RES_0_off_IX_d , OP_BYTE , "LD A,RES 0,(IX+0%02Xh)", NULL }, + { LD_B_RES_1_off_IX_d , OP_BYTE , "LD B,RES 1,(IX+0%02Xh)", NULL }, + { LD_C_RES_1_off_IX_d , OP_BYTE , "LD C,RES 1,(IX+0%02Xh)", NULL }, + { LD_D_RES_1_off_IX_d , OP_BYTE , "LD D,RES 1,(IX+0%02Xh)", NULL }, + { LD_E_RES_1_off_IX_d , OP_BYTE , "LD E,RES 1,(IX+0%02Xh)", NULL }, + { LD_H_RES_1_off_IX_d , OP_BYTE , "LD H,RES 1,(IX+0%02Xh)", NULL }, + { LD_L_RES_1_off_IX_d , OP_BYTE , "LD L,RES 1,(IX+0%02Xh)", NULL }, + { RES_1_off_IX_d , OP_BYTE , "RES 1,(IX+0%02Xh)" , NULL }, + { LD_A_RES_1_off_IX_d , OP_BYTE , "LD A,RES 1,(IX+0%02Xh)", NULL }, + { LD_B_RES_2_off_IX_d , OP_BYTE , "LD B,RES 2,(IX+0%02Xh)", NULL }, + { LD_C_RES_2_off_IX_d , OP_BYTE , "LD C,RES 2,(IX+0%02Xh)", NULL }, + { LD_D_RES_2_off_IX_d , OP_BYTE , "LD D,RES 2,(IX+0%02Xh)", NULL }, + { LD_E_RES_2_off_IX_d , OP_BYTE , "LD E,RES 2,(IX+0%02Xh)", NULL }, + { LD_H_RES_2_off_IX_d , OP_BYTE , "LD H,RES 2,(IX+0%02Xh)", NULL }, + { LD_L_RES_2_off_IX_d , OP_BYTE , "LD L,RES 2,(IX+0%02Xh)", NULL }, + { RES_2_off_IX_d , OP_BYTE , "RES 2,(IX+0%02Xh)" , NULL }, + { LD_A_RES_2_off_IX_d , OP_BYTE , "LD A,RES 2,(IX+0%02Xh)", NULL }, + { LD_B_RES_3_off_IX_d , OP_BYTE , "LD B,RES 3,(IX+0%02Xh)", NULL }, + { LD_C_RES_3_off_IX_d , OP_BYTE , "LD C,RES 3,(IX+0%02Xh)", NULL }, + { LD_D_RES_3_off_IX_d , OP_BYTE , "LD D,RES 3,(IX+0%02Xh)", NULL }, + { LD_E_RES_3_off_IX_d , OP_BYTE , "LD E,RES 3,(IX+0%02Xh)", NULL }, + { LD_H_RES_3_off_IX_d , OP_BYTE , "LD H,RES 3,(IX+0%02Xh)", NULL }, + { LD_L_RES_3_off_IX_d , OP_BYTE , "LD L,RES 3,(IX+0%02Xh)", NULL }, + { RES_3_off_IX_d , OP_BYTE , "RES 3,(IX+0%02Xh)" , NULL }, + { LD_A_RES_3_off_IX_d , OP_BYTE , "LD A,RES 3,(IX+0%02Xh)", NULL }, + { LD_B_RES_4_off_IX_d , OP_BYTE , "LD B,RES 4,(IX+0%02Xh)", NULL }, + { LD_C_RES_4_off_IX_d , OP_BYTE , "LD C,RES 4,(IX+0%02Xh)", NULL }, + { LD_D_RES_4_off_IX_d , OP_BYTE , "LD D,RES 4,(IX+0%02Xh)", NULL }, + { LD_E_RES_4_off_IX_d , OP_BYTE , "LD E,RES 4,(IX+0%02Xh)", NULL }, + { LD_H_RES_4_off_IX_d , OP_BYTE , "LD H,RES 4,(IX+0%02Xh)", NULL }, + { LD_L_RES_4_off_IX_d , OP_BYTE , "LD L,RES 4,(IX+0%02Xh)", NULL }, + { RES_4_off_IX_d , OP_BYTE , "RES 4,(IX+0%02Xh)" , NULL }, + { LD_A_RES_4_off_IX_d , OP_BYTE , "LD A,RES 4,(IX+0%02Xh)", NULL }, + { LD_B_RES_5_off_IX_d , OP_BYTE , "LD B,RES 5,(IX+0%02Xh)", NULL }, + { LD_C_RES_5_off_IX_d , OP_BYTE , "LD C,RES 5,(IX+0%02Xh)", NULL }, + { LD_D_RES_5_off_IX_d , OP_BYTE , "LD D,RES 5,(IX+0%02Xh)", NULL }, + { LD_E_RES_5_off_IX_d , OP_BYTE , "LD E,RES 5,(IX+0%02Xh)", NULL }, + { LD_H_RES_5_off_IX_d , OP_BYTE , "LD H,RES 5,(IX+0%02Xh)", NULL }, + { LD_L_RES_5_off_IX_d , OP_BYTE , "LD L,RES 5,(IX+0%02Xh)", NULL }, + { RES_5_off_IX_d , OP_BYTE , "RES 5,(IX+0%02Xh)" , NULL }, + { LD_A_RES_5_off_IX_d , OP_BYTE , "LD A,RES 5,(IX+0%02Xh)", NULL }, + { LD_B_RES_6_off_IX_d , OP_BYTE , "LD B,RES 6,(IX+0%02Xh)", NULL }, + { LD_C_RES_6_off_IX_d , OP_BYTE , "LD C,RES 6,(IX+0%02Xh)", NULL }, + { LD_D_RES_6_off_IX_d , OP_BYTE , "LD D,RES 6,(IX+0%02Xh)", NULL }, + { LD_E_RES_6_off_IX_d , OP_BYTE , "LD E,RES 6,(IX+0%02Xh)", NULL }, + { LD_H_RES_6_off_IX_d , OP_BYTE , "LD H,RES 6,(IX+0%02Xh)", NULL }, + { LD_L_RES_6_off_IX_d , OP_BYTE , "LD L,RES 6,(IX+0%02Xh)", NULL }, + { RES_6_off_IX_d , OP_BYTE , "RES 6,(IX+0%02Xh)" , NULL }, + { LD_A_RES_6_off_IX_d , OP_BYTE , "LD A,RES 6,(IX+0%02Xh)", NULL }, + { LD_B_RES_7_off_IX_d , OP_BYTE , "LD B,RES 7,(IX+0%02Xh)", NULL }, + { LD_C_RES_7_off_IX_d , OP_BYTE , "LD C,RES 7,(IX+0%02Xh)", NULL }, + { LD_D_RES_7_off_IX_d , OP_BYTE , "LD D,RES 7,(IX+0%02Xh)", NULL }, + { LD_E_RES_7_off_IX_d , OP_BYTE , "LD E,RES 7,(IX+0%02Xh)", NULL }, + { LD_H_RES_7_off_IX_d , OP_BYTE , "LD H,RES 7,(IX+0%02Xh)", NULL }, + { LD_L_RES_7_off_IX_d , OP_BYTE , "LD L,RES 7,(IX+0%02Xh)", NULL }, + { RES_7_off_IX_d , OP_BYTE , "RES 7,(IX+0%02Xh)" , NULL }, + { LD_A_RES_7_off_IX_d , OP_BYTE , "LD A,RES 7,(IX+0%02Xh)", NULL }, + { LD_B_SET_0_off_IX_d , OP_BYTE , "LD B,SET 0,(IX+0%02Xh)", NULL }, + { LD_C_SET_0_off_IX_d , OP_BYTE , "LD C,SET 0,(IX+0%02Xh)", NULL }, + { LD_D_SET_0_off_IX_d , OP_BYTE , "LD D,SET 0,(IX+0%02Xh)", NULL }, + { LD_E_SET_0_off_IX_d , OP_BYTE , "LD E,SET 0,(IX+0%02Xh)", NULL }, + { LD_H_SET_0_off_IX_d , OP_BYTE , "LD H,SET 0,(IX+0%02Xh)", NULL }, + { LD_L_SET_0_off_IX_d , OP_BYTE , "LD L,SET 0,(IX+0%02Xh)", NULL }, + { SET_0_off_IX_d , OP_BYTE , "SET 0,(IX+0%02Xh)" , NULL }, + { LD_A_SET_0_off_IX_d , OP_BYTE , "LD A,SET 0,(IX+0%02Xh)", NULL }, + { LD_B_SET_1_off_IX_d , OP_BYTE , "LD B,SET 1,(IX+0%02Xh)", NULL }, + { LD_C_SET_1_off_IX_d , OP_BYTE , "LD C,SET 1,(IX+0%02Xh)", NULL }, + { LD_D_SET_1_off_IX_d , OP_BYTE , "LD D,SET 1,(IX+0%02Xh)", NULL }, + { LD_E_SET_1_off_IX_d , OP_BYTE , "LD E,SET 1,(IX+0%02Xh)", NULL }, + { LD_H_SET_1_off_IX_d , OP_BYTE , "LD H,SET 1,(IX+0%02Xh)", NULL }, + { LD_L_SET_1_off_IX_d , OP_BYTE , "LD L,SET 1,(IX+0%02Xh)", NULL }, + { SET_1_off_IX_d , OP_BYTE , "SET 1,(IX+0%02Xh)" , NULL }, + { LD_A_SET_1_off_IX_d , OP_BYTE , "LD A,SET 1,(IX+0%02Xh)", NULL }, + { LD_B_SET_2_off_IX_d , OP_BYTE , "LD B,SET 2,(IX+0%02Xh)", NULL }, + { LD_C_SET_2_off_IX_d , OP_BYTE , "LD C,SET 2,(IX+0%02Xh)", NULL }, + { LD_D_SET_2_off_IX_d , OP_BYTE , "LD D,SET 2,(IX+0%02Xh)", NULL }, + { LD_E_SET_2_off_IX_d , OP_BYTE , "LD E,SET 2,(IX+0%02Xh)", NULL }, + { LD_H_SET_2_off_IX_d , OP_BYTE , "LD H,SET 2,(IX+0%02Xh)", NULL }, + { LD_L_SET_2_off_IX_d , OP_BYTE , "LD L,SET 2,(IX+0%02Xh)", NULL }, + { SET_2_off_IX_d , OP_BYTE , "SET 2,(IX+0%02Xh)" , NULL }, + { LD_A_SET_2_off_IX_d , OP_BYTE , "LD A,SET 2,(IX+0%02Xh)", NULL }, + { LD_B_SET_3_off_IX_d , OP_BYTE , "LD B,SET 3,(IX+0%02Xh)", NULL }, + { LD_C_SET_3_off_IX_d , OP_BYTE , "LD C,SET 3,(IX+0%02Xh)", NULL }, + { LD_D_SET_3_off_IX_d , OP_BYTE , "LD D,SET 3,(IX+0%02Xh)", NULL }, + { LD_E_SET_3_off_IX_d , OP_BYTE , "LD E,SET 3,(IX+0%02Xh)", NULL }, + { LD_H_SET_3_off_IX_d , OP_BYTE , "LD H,SET 3,(IX+0%02Xh)", NULL }, + { LD_L_SET_3_off_IX_d , OP_BYTE , "LD L,SET 3,(IX+0%02Xh)", NULL }, + { SET_3_off_IX_d , OP_BYTE , "SET 3,(IX+0%02Xh)" , NULL }, + { LD_A_SET_3_off_IX_d , OP_BYTE , "LD A,SET 3,(IX+0%02Xh)", NULL }, + { LD_B_SET_4_off_IX_d , OP_BYTE , "LD B,SET 4,(IX+0%02Xh)", NULL }, + { LD_C_SET_4_off_IX_d , OP_BYTE , "LD C,SET 4,(IX+0%02Xh)", NULL }, + { LD_D_SET_4_off_IX_d , OP_BYTE , "LD D,SET 4,(IX+0%02Xh)", NULL }, + { LD_E_SET_4_off_IX_d , OP_BYTE , "LD E,SET 4,(IX+0%02Xh)", NULL }, + { LD_H_SET_4_off_IX_d , OP_BYTE , "LD H,SET 4,(IX+0%02Xh)", NULL }, + { LD_L_SET_4_off_IX_d , OP_BYTE , "LD L,SET 4,(IX+0%02Xh)", NULL }, + { SET_4_off_IX_d , OP_BYTE , "SET 4,(IX+0%02Xh)" , NULL }, + { LD_A_SET_4_off_IX_d , OP_BYTE , "LD A,SET 4,(IX+0%02Xh)", NULL }, + { LD_B_SET_5_off_IX_d , OP_BYTE , "LD B,SET 5,(IX+0%02Xh)", NULL }, + { LD_C_SET_5_off_IX_d , OP_BYTE , "LD C,SET 5,(IX+0%02Xh)", NULL }, + { LD_D_SET_5_off_IX_d , OP_BYTE , "LD D,SET 5,(IX+0%02Xh)", NULL }, + { LD_E_SET_5_off_IX_d , OP_BYTE , "LD E,SET 5,(IX+0%02Xh)", NULL }, + { LD_H_SET_5_off_IX_d , OP_BYTE , "LD H,SET 5,(IX+0%02Xh)", NULL }, + { LD_L_SET_5_off_IX_d , OP_BYTE , "LD L,SET 5,(IX+0%02Xh)", NULL }, + { SET_5_off_IX_d , OP_BYTE , "SET 5,(IX+0%02Xh)" , NULL }, + { LD_A_SET_5_off_IX_d , OP_BYTE , "LD A,SET 5,(IX+0%02Xh)", NULL }, + { LD_B_SET_6_off_IX_d , OP_BYTE , "LD B,SET 6,(IX+0%02Xh)", NULL }, + { LD_C_SET_6_off_IX_d , OP_BYTE , "LD C,SET 6,(IX+0%02Xh)", NULL }, + { LD_D_SET_6_off_IX_d , OP_BYTE , "LD D,SET 6,(IX+0%02Xh)", NULL }, + { LD_E_SET_6_off_IX_d , OP_BYTE , "LD E,SET 6,(IX+0%02Xh)", NULL }, + { LD_H_SET_6_off_IX_d , OP_BYTE , "LD H,SET 6,(IX+0%02Xh)", NULL }, + { LD_L_SET_6_off_IX_d , OP_BYTE , "LD L,SET 6,(IX+0%02Xh)", NULL }, + { SET_6_off_IX_d , OP_BYTE , "SET 6,(IX+0%02Xh)" , NULL }, + { LD_A_SET_6_off_IX_d , OP_BYTE , "LD A,SET 6,(IX+0%02Xh)", NULL }, + { LD_B_SET_7_off_IX_d , OP_BYTE , "LD B,SET 7,(IX+0%02Xh)", NULL }, + { LD_C_SET_7_off_IX_d , OP_BYTE , "LD C,SET 7,(IX+0%02Xh)", NULL }, + { LD_D_SET_7_off_IX_d , OP_BYTE , "LD D,SET 7,(IX+0%02Xh)", NULL }, + { LD_E_SET_7_off_IX_d , OP_BYTE , "LD E,SET 7,(IX+0%02Xh)", NULL }, + { LD_H_SET_7_off_IX_d , OP_BYTE , "LD H,SET 7,(IX+0%02Xh)", NULL }, + { LD_L_SET_7_off_IX_d , OP_BYTE , "LD L,SET 7,(IX+0%02Xh)", NULL }, + { SET_7_off_IX_d , OP_BYTE , "SET 7,(IX+0%02Xh)" , NULL }, + { LD_A_SET_7_off_IX_d , OP_BYTE , "LD A,SET 7,(IX+0%02Xh)", NULL } +} }; + + +static struct Z80OpcodeTable opcodes_ED = { 0, { + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { IN_B_off_C , OP_NONE , "IN B,(C)" , NULL }, + { OUT_off_C_B , OP_NONE , "OUT (C),B" , NULL }, + { SBC_HL_BC , OP_NONE , "SBC HL,BC" , NULL }, + { LD_off_nn_BC , OP_WORD , "LD (0%04Xh),BC" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETN , OP_NONE , "RETN" , NULL }, + { IM_0 , OP_NONE , "IM 0" , NULL }, + { LD_I_A , OP_NONE , "LD I,A" , NULL }, + { IN_C_off_C , OP_NONE , "IN C,(C)" , NULL }, + { OUT_off_C_C , OP_NONE , "OUT (C),C" , NULL }, + { ADC_HL_BC , OP_NONE , "ADC HL,BC" , NULL }, + { LD_BC_off_nn , OP_WORD , "LD BC,(0%04Xh)" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETI , OP_NONE , "RETI" , NULL }, + { IM_0 , OP_NONE , "IM 0" , NULL }, + { LD_R_A , OP_NONE , "LD R,A" , NULL }, + { IN_D_off_C , OP_NONE , "IN D,(C)" , NULL }, + { OUT_off_C_D , OP_NONE , "OUT (C),D" , NULL }, + { SBC_HL_DE , OP_NONE , "SBC HL,DE" , NULL }, + { LD_off_nn_DE , OP_WORD , "LD (0%04Xh),DE" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETN , OP_NONE , "RETN" , NULL }, + { IM_1 , OP_NONE , "IM 1" , NULL }, + { LD_A_I , OP_NONE , "LD A,I" , NULL }, + { IN_E_off_C , OP_NONE , "IN E,(C)" , NULL }, + { OUT_off_C_E , OP_NONE , "OUT (C),E" , NULL }, + { ADC_HL_DE , OP_NONE , "ADC HL,DE" , NULL }, + { LD_DE_off_nn , OP_WORD , "LD DE,(0%04Xh)" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETN , OP_NONE , "RETN" , NULL }, + { IM_2 , OP_NONE , "IM 2" , NULL }, + { LD_A_R , OP_NONE , "LD A,R" , NULL }, + { IN_H_off_C , OP_NONE , "IN H,(C)" , NULL }, + { OUT_off_C_H , OP_NONE , "OUT (C),H" , NULL }, + { SBC_HL_HL , OP_NONE , "SBC HL,HL" , NULL }, + { LD_off_nn_HL , OP_WORD , "LD (0%04Xh),HL" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETN , OP_NONE , "RETN" , NULL }, + { IM_0 , OP_NONE , "IM 0" , NULL }, + { RRD , OP_NONE , "RRD" , NULL }, + { IN_L_off_C , OP_NONE , "IN L,(C)" , NULL }, + { OUT_off_C_L , OP_NONE , "OUT (C),L" , NULL }, + { ADC_HL_HL , OP_NONE , "ADC HL,HL" , NULL }, + { LD_HL_off_nn , OP_WORD , "LD HL,(0%04Xh)" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETN , OP_NONE , "RETN" , NULL }, + { IM_0 , OP_NONE , "IM 0" , NULL }, + { RLD , OP_NONE , "RLD" , NULL }, + { IN_F_off_C , OP_NONE , "IN F,(C)" , NULL }, + { OUT_off_C_0 , OP_NONE , "OUT (C),0" , NULL }, + { SBC_HL_SP , OP_NONE , "SBC HL,SP" , NULL }, + { LD_off_nn_SP , OP_WORD , "LD (0%04Xh),SP" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETN , OP_NONE , "RETN" , NULL }, + { IM_1 , OP_NONE , "IM 1" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { IN_A_off_C , OP_NONE , "IN A,(C)" , NULL }, + { OUT_off_C_A , OP_NONE , "OUT (C),A" , NULL }, + { ADC_HL_SP , OP_NONE , "ADC HL,SP" , NULL }, + { LD_SP_off_nn , OP_WORD , "LD SP,(0%04Xh)" , NULL }, + { NEG , OP_NONE , "NEG" , NULL }, + { RETN , OP_NONE , "RETN" , NULL }, + { IM_2 , OP_NONE , "IM 2" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LDI , OP_NONE , "LDI" , NULL }, + { CPI , OP_NONE , "CPI" , NULL }, + { INI , OP_NONE , "INI" , NULL }, + { OUTI , OP_NONE , "OUTI" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LDD , OP_NONE , "LDD" , NULL }, + { CPD , OP_NONE , "CPD" , NULL }, + { IND , OP_NONE , "IND" , NULL }, + { OUTD , OP_NONE , "OUTD" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LDIR , OP_NONE , "LDIR" , NULL }, + { CPIR , OP_NONE , "CPIR" , NULL }, + { INIR , OP_NONE , "INIR" , NULL }, + { OTIR , OP_NONE , "OTIR" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LDDR , OP_NONE , "LDDR" , NULL }, + { CPDR , OP_NONE , "CPDR" , NULL }, + { INDR , OP_NONE , "INDR" , NULL }, + { OTDR , OP_NONE , "OTDR" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL } +} }; + + +static struct Z80OpcodeTable opcodes_FD = { 0, { + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IY_BC , OP_NONE , "ADD IY,BC" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IY_DE , OP_NONE , "ADD IY,DE" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_IY_nn , OP_WORD , "LD IY,0%04Xh" , NULL }, + { LD_off_nn_IY , OP_WORD , "LD (0%04Xh),IY" , NULL }, + { INC_IY , OP_NONE , "INC IY" , NULL }, + { INC_IYh , OP_NONE , "INC IYh" , NULL }, + { DEC_IYh , OP_NONE , "DEC IYh" , NULL }, + { LD_IYh_n , OP_BYTE , "LD IYh,0%02Xh" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IY_IY , OP_NONE , "ADD IY,IY" , NULL }, + { LD_IY_off_nn , OP_WORD , "LD IY,(0%04Xh)" , NULL }, + { DEC_IY , OP_NONE , "DEC IY" , NULL }, + { INC_IYl , OP_NONE , "INC IYl" , NULL }, + { DEC_IYl , OP_NONE , "DEC IYl" , NULL }, + { LD_IYl_n , OP_BYTE , "LD IYl,0%02Xh" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { INC_off_IY_d , OP_BYTE , "INC (IY+0%02Xh)" , NULL }, + { DEC_off_IY_d , OP_BYTE , "DEC (IY+0%02Xh)" , NULL }, + { LD_off_IY_d_n , OP_BYTE , "LD (IY+0%02Xh),0%02Xh", NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_IY_SP , OP_NONE , "ADD IY,SP" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_B_IYh , OP_NONE , "LD B,IYh" , NULL }, + { LD_B_IYl , OP_NONE , "LD B,IYl" , NULL }, + { LD_B_off_IY_d , OP_BYTE , "LD B,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_C_IYh , OP_NONE , "LD C,IYh" , NULL }, + { LD_C_IYl , OP_NONE , "LD C,IYl" , NULL }, + { LD_C_off_IY_d , OP_BYTE , "LD C,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_D_IYh , OP_NONE , "LD D,IYh" , NULL }, + { LD_D_IYl , OP_NONE , "LD D,IYl" , NULL }, + { LD_D_off_IY_d , OP_BYTE , "LD D,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_E_IYh , OP_NONE , "LD E,IYh" , NULL }, + { LD_E_IYl , OP_NONE , "LD E,IYl" , NULL }, + { LD_E_off_IY_d , OP_BYTE , "LD E,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_IYh_B , OP_NONE , "LD IYh,B" , NULL }, + { LD_IYh_C , OP_NONE , "LD IYh,C" , NULL }, + { LD_IYh_D , OP_NONE , "LD IYh,D" , NULL }, + { LD_IYh_E , OP_NONE , "LD IYh,E" , NULL }, + { LD_IYh_IYh , OP_NONE , "LD IYh,IYh" , NULL }, + { LD_IYh_IYl , OP_NONE , "LD IYh,IYl" , NULL }, + { LD_H_off_IY_d , OP_BYTE , "LD H,(IY+0%02Xh)" , NULL }, + { LD_IYh_A , OP_NONE , "LD IYh,A" , NULL }, + { LD_IYl_B , OP_NONE , "LD IYl,B" , NULL }, + { LD_IYl_C , OP_NONE , "LD IYl,C" , NULL }, + { LD_IYl_D , OP_NONE , "LD IYl,D" , NULL }, + { LD_IYl_E , OP_NONE , "LD IYl,E" , NULL }, + { LD_IYl_IYh , OP_NONE , "LD IYl,IYh" , NULL }, + { LD_IYl_IYl , OP_NONE , "LD IYl,IYl" , NULL }, + { LD_L_off_IY_d , OP_BYTE , "LD L,(IY+0%02Xh)" , NULL }, + { LD_IYl_A , OP_NONE , "LD IYl,A" , NULL }, + { LD_off_IY_d_B , OP_BYTE , "LD (IY+0%02Xh),B" , NULL }, + { LD_off_IY_d_C , OP_BYTE , "LD (IY+0%02Xh),C" , NULL }, + { LD_off_IY_d_D , OP_BYTE , "LD (IY+0%02Xh),D" , NULL }, + { LD_off_IY_d_E , OP_BYTE , "LD (IY+0%02Xh),E" , NULL }, + { LD_off_IY_d_H , OP_BYTE , "LD (IY+0%02Xh),H" , NULL }, + { LD_off_IY_d_L , OP_BYTE , "LD (IY+0%02Xh),L" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_off_IY_d_A , OP_BYTE , "LD (IY+0%02Xh),A" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_A_IYh , OP_NONE , "LD A,IYh" , NULL }, + { LD_A_IYl , OP_NONE , "LD A,IYl" , NULL }, + { LD_A_off_IY_d , OP_BYTE , "LD A,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADD_A_IYh , OP_NONE , "ADD A,IYh" , NULL }, + { ADD_A_IYl , OP_NONE , "ADD A,IYl" , NULL }, + { ADD_A_off_IY_d , OP_BYTE , "ADD A,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { ADC_A_IYh , OP_NONE , "ADC A,IYh" , NULL }, + { ADC_A_IYl , OP_NONE , "ADC A,IYl" , NULL }, + { ADC_A_off_IY_d , OP_BYTE , "ADC A,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { SUB_A_IYh , OP_NONE , "SUB A,IYh" , NULL }, + { SUB_A_IYl , OP_NONE , "SUB A,IYl" , NULL }, + { SUB_A_off_IY_d , OP_BYTE , "SUB A,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { SBC_A_IYh , OP_NONE , "SBC A,IYh" , NULL }, + { SBC_A_IYl , OP_NONE , "SBC A,IYl" , NULL }, + { SBC_A_off_IY_d , OP_BYTE , "SBC A,(IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { AND_IYh , OP_NONE , "AND IYh" , NULL }, + { AND_IYl , OP_NONE , "AND IYl" , NULL }, + { AND_off_IY_d , OP_BYTE , "AND (IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { XOR_IYh , OP_NONE , "XOR IYh" , NULL }, + { XOR_IYl , OP_NONE , "XOR IYl" , NULL }, + { XOR_off_IY_d , OP_BYTE , "XOR (IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { OR_IYh , OP_NONE , "OR IYh" , NULL }, + { OR_IYl , OP_NONE , "OR IYl" , NULL }, + { OR_off_IY_d , OP_BYTE , "OR (IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { CP_IYh , OP_NONE , "CP IYh" , NULL }, + { CP_IYl , OP_NONE , "CP IYl" , NULL }, + { CP_off_IY_d , OP_BYTE , "CP (IY+0%02Xh)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , &opcodes_FDCB }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { POP_IY , OP_NONE , "POP IY" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { EX_off_SP_IY , OP_NONE , "EX (SP),IY" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { PUSH_IY , OP_NONE , "PUSH IY" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { JP_off_IY , OP_NONE , "JP (IY)" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { LD_SP_IY , OP_NONE , "LD SP,IY" , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL }, + { NULL , OP_NONE , NULL , NULL } +} }; + + +static struct Z80OpcodeTable opcodes_FDCB = { 1, { + { LD_B_RLC_off_IY_d , OP_BYTE , "LD B,RLC (IY+0%02Xh)", NULL }, + { LD_C_RLC_off_IY_d , OP_BYTE , "LD C,RLC (IY+0%02Xh)", NULL }, + { LD_D_RLC_off_IY_d , OP_BYTE , "LD D,RLC (IY+0%02Xh)", NULL }, + { LD_E_RLC_off_IY_d , OP_BYTE , "LD E,RLC (IY+0%02Xh)", NULL }, + { LD_H_RLC_off_IY_d , OP_BYTE , "LD H,RLC (IY+0%02Xh)", NULL }, + { LD_L_RLC_off_IY_d , OP_BYTE , "LD L,RLC (IY+0%02Xh)", NULL }, + { RLC_off_IY_d , OP_BYTE , "RLC (IY+0%02Xh)" , NULL }, + { LD_A_RLC_off_IY_d , OP_BYTE , "LD A,RLC (IY+0%02Xh)", NULL }, + { LD_B_RRC_off_IY_d , OP_BYTE , "LD B,RRC (IY+0%02Xh)", NULL }, + { LD_C_RRC_off_IY_d , OP_BYTE , "LD C,RRC (IY+0%02Xh)", NULL }, + { LD_D_RRC_off_IY_d , OP_BYTE , "LD D,RRC (IY+0%02Xh)", NULL }, + { LD_E_RRC_off_IY_d , OP_BYTE , "LD E,RRC (IY+0%02Xh)", NULL }, + { LD_H_RRC_off_IY_d , OP_BYTE , "LD H,RRC (IY+0%02Xh)", NULL }, + { LD_L_RRC_off_IY_d , OP_BYTE , "LD L,RRC (IY+0%02Xh)", NULL }, + { RRC_off_IY_d , OP_BYTE , "RRC (IY+0%02Xh)" , NULL }, + { LD_A_RRC_off_IY_d , OP_BYTE , "LD A,RRC (IY+0%02Xh)", NULL }, + { LD_B_RL_off_IY_d , OP_BYTE , "LD B,RL (IY+0%02Xh)", NULL }, + { LD_C_RL_off_IY_d , OP_BYTE , "LD C,RL (IY+0%02Xh)", NULL }, + { LD_D_RL_off_IY_d , OP_BYTE , "LD D,RL (IY+0%02Xh)", NULL }, + { LD_E_RL_off_IY_d , OP_BYTE , "LD E,RL (IY+0%02Xh)", NULL }, + { LD_H_RL_off_IY_d , OP_BYTE , "LD H,RL (IY+0%02Xh)", NULL }, + { LD_L_RL_off_IY_d , OP_BYTE , "LD L,RL (IY+0%02Xh)", NULL }, + { RL_off_IY_d , OP_BYTE , "RL (IY+0%02Xh)" , NULL }, + { LD_A_RL_off_IY_d , OP_BYTE , "LD A,RL (IY+0%02Xh)", NULL }, + { LD_B_RR_off_IY_d , OP_BYTE , "LD B,RR (IY+0%02Xh)", NULL }, + { LD_C_RR_off_IY_d , OP_BYTE , "LD C,RR (IY+0%02Xh)", NULL }, + { LD_D_RR_off_IY_d , OP_BYTE , "LD D,RR (IY+0%02Xh)", NULL }, + { LD_E_RR_off_IY_d , OP_BYTE , "LD E,RR (IY+0%02Xh)", NULL }, + { LD_H_RR_off_IY_d , OP_BYTE , "LD H,RR (IY+0%02Xh)", NULL }, + { LD_L_RR_off_IY_d , OP_BYTE , "LD L,RR (IY+0%02Xh)", NULL }, + { RR_off_IY_d , OP_BYTE , "RR (IY+0%02Xh)" , NULL }, + { LD_A_RR_off_IY_d , OP_BYTE , "LD A,RR (IY+0%02Xh)", NULL }, + { LD_B_SLA_off_IY_d , OP_BYTE , "LD B,SLA (IY+0%02Xh)", NULL }, + { LD_C_SLA_off_IY_d , OP_BYTE , "LD C,SLA (IY+0%02Xh)", NULL }, + { LD_D_SLA_off_IY_d , OP_BYTE , "LD D,SLA (IY+0%02Xh)", NULL }, + { LD_E_SLA_off_IY_d , OP_BYTE , "LD E,SLA (IY+0%02Xh)", NULL }, + { LD_H_SLA_off_IY_d , OP_BYTE , "LD H,SLA (IY+0%02Xh)", NULL }, + { LD_L_SLA_off_IY_d , OP_BYTE , "LD L,SLA (IY+0%02Xh)", NULL }, + { SLA_off_IY_d , OP_BYTE , "SLA (IY+0%02Xh)" , NULL }, + { LD_A_SLA_off_IY_d , OP_BYTE , "LD A,SLA (IY+0%02Xh)", NULL }, + { LD_B_SRA_off_IY_d , OP_BYTE , "LD B,SRA (IY+0%02Xh)", NULL }, + { LD_C_SRA_off_IY_d , OP_BYTE , "LD C,SRA (IY+0%02Xh)", NULL }, + { LD_D_SRA_off_IY_d , OP_BYTE , "LD D,SRA (IY+0%02Xh)", NULL }, + { LD_E_SRA_off_IY_d , OP_BYTE , "LD E,SRA (IY+0%02Xh)", NULL }, + { LD_H_SRA_off_IY_d , OP_BYTE , "LD H,SRA (IY+0%02Xh)", NULL }, + { LD_L_SRA_off_IY_d , OP_BYTE , "LD L,SRA (IY+0%02Xh)", NULL }, + { SRA_off_IY_d , OP_BYTE , "SRA (IY+0%02Xh)" , NULL }, + { LD_A_SRA_off_IY_d , OP_BYTE , "LD A,SRA (IY+0%02Xh)", NULL }, + { LD_B_SLL_off_IY_d , OP_BYTE , "LD B,SLL (IY+0%02Xh)", NULL }, + { LD_C_SLL_off_IY_d , OP_BYTE , "LD C,SLL (IY+0%02Xh)", NULL }, + { LD_D_SLL_off_IY_d , OP_BYTE , "LD D,SLL (IY+0%02Xh)", NULL }, + { LD_E_SLL_off_IY_d , OP_BYTE , "LD E,SLL (IY+0%02Xh)", NULL }, + { LD_H_SLL_off_IY_d , OP_BYTE , "LD H,SLL (IY+0%02Xh)", NULL }, + { LD_L_SLL_off_IY_d , OP_BYTE , "LD L,SLL (IY+0%02Xh)", NULL }, + { SLL_off_IY_d , OP_BYTE , "SLL (IY+0%02Xh)" , NULL }, + { LD_A_SLL_off_IY_d , OP_BYTE , "LD A,SLL (IY+0%02Xh)", NULL }, + { LD_B_SRL_off_IY_d , OP_BYTE , "LD B,SRL (IY+0%02Xh)", NULL }, + { LD_C_SRL_off_IY_d , OP_BYTE , "LD C,SRL (IY+0%02Xh)", NULL }, + { LD_D_SRL_off_IY_d , OP_BYTE , "LD D,SRL (IY+0%02Xh)", NULL }, + { LD_E_SRL_off_IY_d , OP_BYTE , "LD E,SRL (IY+0%02Xh)", NULL }, + { LD_H_SRL_off_IY_d , OP_BYTE , "LD H,SRL (IY+0%02Xh)", NULL }, + { LD_L_SRL_off_IY_d , OP_BYTE , "LD L,SRL (IY+0%02Xh)", NULL }, + { SRL_off_IY_d , OP_BYTE , "SRL (IY+0%02Xh)" , NULL }, + { LD_A_SRL_off_IY_d , OP_BYTE , "LD A,SRL (IY+0%02Xh)", NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_0_off_IY_d , OP_BYTE , "BIT 0,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_1_off_IY_d , OP_BYTE , "BIT 1,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_2_off_IY_d , OP_BYTE , "BIT 2,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_3_off_IY_d , OP_BYTE , "BIT 3,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_4_off_IY_d , OP_BYTE , "BIT 4,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_5_off_IY_d , OP_BYTE , "BIT 5,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_6_off_IY_d , OP_BYTE , "BIT 6,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { BIT_7_off_IY_d , OP_BYTE , "BIT 7,(IY+0%02Xh)" , NULL }, + { LD_B_RES_0_off_IY_d , OP_BYTE , "LD B,RES 0,(IY+0%02Xh)", NULL }, + { LD_C_RES_0_off_IY_d , OP_BYTE , "LD C,RES 0,(IY+0%02Xh)", NULL }, + { LD_D_RES_0_off_IY_d , OP_BYTE , "LD D,RES 0,(IY+0%02Xh)", NULL }, + { LD_E_RES_0_off_IY_d , OP_BYTE , "LD E,RES 0,(IY+0%02Xh)", NULL }, + { LD_H_RES_0_off_IY_d , OP_BYTE , "LD H,RES 0,(IY+0%02Xh)", NULL }, + { LD_L_RES_0_off_IY_d , OP_BYTE , "LD L,RES 0,(IY+0%02Xh)", NULL }, + { RES_0_off_IY_d , OP_BYTE , "RES 0,(IY+0%02Xh)" , NULL }, + { LD_A_RES_0_off_IY_d , OP_BYTE , "LD A,RES 0,(IY+0%02Xh)", NULL }, + { LD_B_RES_1_off_IY_d , OP_BYTE , "LD B,RES 1,(IY+0%02Xh)", NULL }, + { LD_C_RES_1_off_IY_d , OP_BYTE , "LD C,RES 1,(IY+0%02Xh)", NULL }, + { LD_D_RES_1_off_IY_d , OP_BYTE , "LD D,RES 1,(IY+0%02Xh)", NULL }, + { LD_E_RES_1_off_IY_d , OP_BYTE , "LD E,RES 1,(IY+0%02Xh)", NULL }, + { LD_H_RES_1_off_IY_d , OP_BYTE , "LD H,RES 1,(IY+0%02Xh)", NULL }, + { LD_L_RES_1_off_IY_d , OP_BYTE , "LD L,RES 1,(IY+0%02Xh)", NULL }, + { RES_1_off_IY_d , OP_BYTE , "RES 1,(IY+0%02Xh)" , NULL }, + { LD_A_RES_1_off_IY_d , OP_BYTE , "LD A,RES 1,(IY+0%02Xh)", NULL }, + { LD_B_RES_2_off_IY_d , OP_BYTE , "LD B,RES 2,(IY+0%02Xh)", NULL }, + { LD_C_RES_2_off_IY_d , OP_BYTE , "LD C,RES 2,(IY+0%02Xh)", NULL }, + { LD_D_RES_2_off_IY_d , OP_BYTE , "LD D,RES 2,(IY+0%02Xh)", NULL }, + { LD_E_RES_2_off_IY_d , OP_BYTE , "LD E,RES 2,(IY+0%02Xh)", NULL }, + { LD_H_RES_2_off_IY_d , OP_BYTE , "LD H,RES 2,(IY+0%02Xh)", NULL }, + { LD_L_RES_2_off_IY_d , OP_BYTE , "LD L,RES 2,(IY+0%02Xh)", NULL }, + { RES_2_off_IY_d , OP_BYTE , "RES 2,(IY+0%02Xh)" , NULL }, + { LD_A_RES_2_off_IY_d , OP_BYTE , "LD A,RES 2,(IY+0%02Xh)", NULL }, + { LD_B_RES_3_off_IY_d , OP_BYTE , "LD B,RES 3,(IY+0%02Xh)", NULL }, + { LD_C_RES_3_off_IY_d , OP_BYTE , "LD C,RES 3,(IY+0%02Xh)", NULL }, + { LD_D_RES_3_off_IY_d , OP_BYTE , "LD D,RES 3,(IY+0%02Xh)", NULL }, + { LD_E_RES_3_off_IY_d , OP_BYTE , "LD E,RES 3,(IY+0%02Xh)", NULL }, + { LD_H_RES_3_off_IY_d , OP_BYTE , "LD H,RES 3,(IY+0%02Xh)", NULL }, + { LD_L_RES_3_off_IY_d , OP_BYTE , "LD L,RES 3,(IY+0%02Xh)", NULL }, + { RES_3_off_IY_d , OP_BYTE , "RES 3,(IY+0%02Xh)" , NULL }, + { LD_A_RES_3_off_IY_d , OP_BYTE , "LD A,RES 3,(IY+0%02Xh)", NULL }, + { LD_B_RES_4_off_IY_d , OP_BYTE , "LD B,RES 4,(IY+0%02Xh)", NULL }, + { LD_C_RES_4_off_IY_d , OP_BYTE , "LD C,RES 4,(IY+0%02Xh)", NULL }, + { LD_D_RES_4_off_IY_d , OP_BYTE , "LD D,RES 4,(IY+0%02Xh)", NULL }, + { LD_E_RES_4_off_IY_d , OP_BYTE , "LD E,RES 4,(IY+0%02Xh)", NULL }, + { LD_H_RES_4_off_IY_d , OP_BYTE , "LD H,RES 4,(IY+0%02Xh)", NULL }, + { LD_L_RES_4_off_IY_d , OP_BYTE , "LD L,RES 4,(IY+0%02Xh)", NULL }, + { RES_4_off_IY_d , OP_BYTE , "RES 4,(IY+0%02Xh)" , NULL }, + { LD_A_RES_4_off_IY_d , OP_BYTE , "LD A,RES 4,(IY+0%02Xh)", NULL }, + { LD_B_RES_5_off_IY_d , OP_BYTE , "LD B,RES 5,(IY+0%02Xh)", NULL }, + { LD_C_RES_5_off_IY_d , OP_BYTE , "LD C,RES 5,(IY+0%02Xh)", NULL }, + { LD_D_RES_5_off_IY_d , OP_BYTE , "LD D,RES 5,(IY+0%02Xh)", NULL }, + { LD_E_RES_5_off_IY_d , OP_BYTE , "LD E,RES 5,(IY+0%02Xh)", NULL }, + { LD_H_RES_5_off_IY_d , OP_BYTE , "LD H,RES 5,(IY+0%02Xh)", NULL }, + { LD_L_RES_5_off_IY_d , OP_BYTE , "LD L,RES 5,(IY+0%02Xh)", NULL }, + { RES_5_off_IY_d , OP_BYTE , "RES 5,(IY+0%02Xh)" , NULL }, + { LD_A_RES_5_off_IY_d , OP_BYTE , "LD A,RES 5,(IY+0%02Xh)", NULL }, + { LD_B_RES_6_off_IY_d , OP_BYTE , "LD B,RES 6,(IY+0%02Xh)", NULL }, + { LD_C_RES_6_off_IY_d , OP_BYTE , "LD C,RES 6,(IY+0%02Xh)", NULL }, + { LD_D_RES_6_off_IY_d , OP_BYTE , "LD D,RES 6,(IY+0%02Xh)", NULL }, + { LD_E_RES_6_off_IY_d , OP_BYTE , "LD E,RES 6,(IY+0%02Xh)", NULL }, + { LD_H_RES_6_off_IY_d , OP_BYTE , "LD H,RES 6,(IY+0%02Xh)", NULL }, + { LD_L_RES_6_off_IY_d , OP_BYTE , "LD L,RES 6,(IY+0%02Xh)", NULL }, + { RES_6_off_IY_d , OP_BYTE , "RES 6,(IY+0%02Xh)" , NULL }, + { LD_A_RES_6_off_IY_d , OP_BYTE , "LD A,RES 6,(IY+0%02Xh)", NULL }, + { LD_B_RES_7_off_IY_d , OP_BYTE , "LD B,RES 7,(IY+0%02Xh)", NULL }, + { LD_C_RES_7_off_IY_d , OP_BYTE , "LD C,RES 7,(IY+0%02Xh)", NULL }, + { LD_D_RES_7_off_IY_d , OP_BYTE , "LD D,RES 7,(IY+0%02Xh)", NULL }, + { LD_E_RES_7_off_IY_d , OP_BYTE , "LD E,RES 7,(IY+0%02Xh)", NULL }, + { LD_H_RES_7_off_IY_d , OP_BYTE , "LD H,RES 7,(IY+0%02Xh)", NULL }, + { LD_L_RES_7_off_IY_d , OP_BYTE , "LD L,RES 7,(IY+0%02Xh)", NULL }, + { RES_7_off_IY_d , OP_BYTE , "RES 7,(IY+0%02Xh)" , NULL }, + { LD_A_RES_7_off_IY_d , OP_BYTE , "LD A,RES 7,(IY+0%02Xh)", NULL }, + { LD_B_SET_0_off_IY_d , OP_BYTE , "LD B,SET 0,(IY+0%02Xh)", NULL }, + { LD_C_SET_0_off_IY_d , OP_BYTE , "LD C,SET 0,(IY+0%02Xh)", NULL }, + { LD_D_SET_0_off_IY_d , OP_BYTE , "LD D,SET 0,(IY+0%02Xh)", NULL }, + { LD_E_SET_0_off_IY_d , OP_BYTE , "LD E,SET 0,(IY+0%02Xh)", NULL }, + { LD_H_SET_0_off_IY_d , OP_BYTE , "LD H,SET 0,(IY+0%02Xh)", NULL }, + { LD_L_SET_0_off_IY_d , OP_BYTE , "LD L,SET 0,(IY+0%02Xh)", NULL }, + { SET_0_off_IY_d , OP_BYTE , "SET 0,(IY+0%02Xh)" , NULL }, + { LD_A_SET_0_off_IY_d , OP_BYTE , "LD A,SET 0,(IY+0%02Xh)", NULL }, + { LD_B_SET_1_off_IY_d , OP_BYTE , "LD B,SET 1,(IY+0%02Xh)", NULL }, + { LD_C_SET_1_off_IY_d , OP_BYTE , "LD C,SET 1,(IY+0%02Xh)", NULL }, + { LD_D_SET_1_off_IY_d , OP_BYTE , "LD D,SET 1,(IY+0%02Xh)", NULL }, + { LD_E_SET_1_off_IY_d , OP_BYTE , "LD E,SET 1,(IY+0%02Xh)", NULL }, + { LD_H_SET_1_off_IY_d , OP_BYTE , "LD H,SET 1,(IY+0%02Xh)", NULL }, + { LD_L_SET_1_off_IY_d , OP_BYTE , "LD L,SET 1,(IY+0%02Xh)", NULL }, + { SET_1_off_IY_d , OP_BYTE , "SET 1,(IY+0%02Xh)" , NULL }, + { LD_A_SET_1_off_IY_d , OP_BYTE , "LD A,SET 1,(IY+0%02Xh)", NULL }, + { LD_B_SET_2_off_IY_d , OP_BYTE , "LD B,SET 2,(IY+0%02Xh)", NULL }, + { LD_C_SET_2_off_IY_d , OP_BYTE , "LD C,SET 2,(IY+0%02Xh)", NULL }, + { LD_D_SET_2_off_IY_d , OP_BYTE , "LD D,SET 2,(IY+0%02Xh)", NULL }, + { LD_E_SET_2_off_IY_d , OP_BYTE , "LD E,SET 2,(IY+0%02Xh)", NULL }, + { LD_H_SET_2_off_IY_d , OP_BYTE , "LD H,SET 2,(IY+0%02Xh)", NULL }, + { LD_L_SET_2_off_IY_d , OP_BYTE , "LD L,SET 2,(IY+0%02Xh)", NULL }, + { SET_2_off_IY_d , OP_BYTE , "SET 2,(IY+0%02Xh)" , NULL }, + { LD_A_SET_2_off_IY_d , OP_BYTE , "LD A,SET 2,(IY+0%02Xh)", NULL }, + { LD_B_SET_3_off_IY_d , OP_BYTE , "LD B,SET 3,(IY+0%02Xh)", NULL }, + { LD_C_SET_3_off_IY_d , OP_BYTE , "LD C,SET 3,(IY+0%02Xh)", NULL }, + { LD_D_SET_3_off_IY_d , OP_BYTE , "LD D,SET 3,(IY+0%02Xh)", NULL }, + { LD_E_SET_3_off_IY_d , OP_BYTE , "LD E,SET 3,(IY+0%02Xh)", NULL }, + { LD_H_SET_3_off_IY_d , OP_BYTE , "LD H,SET 3,(IY+0%02Xh)", NULL }, + { LD_L_SET_3_off_IY_d , OP_BYTE , "LD L,SET 3,(IY+0%02Xh)", NULL }, + { SET_3_off_IY_d , OP_BYTE , "SET 3,(IY+0%02Xh)" , NULL }, + { LD_A_SET_3_off_IY_d , OP_BYTE , "LD A,SET 3,(IY+0%02Xh)", NULL }, + { LD_B_SET_4_off_IY_d , OP_BYTE , "LD B,SET 4,(IY+0%02Xh)", NULL }, + { LD_C_SET_4_off_IY_d , OP_BYTE , "LD C,SET 4,(IY+0%02Xh)", NULL }, + { LD_D_SET_4_off_IY_d , OP_BYTE , "LD D,SET 4,(IY+0%02Xh)", NULL }, + { LD_E_SET_4_off_IY_d , OP_BYTE , "LD E,SET 4,(IY+0%02Xh)", NULL }, + { LD_H_SET_4_off_IY_d , OP_BYTE , "LD H,SET 4,(IY+0%02Xh)", NULL }, + { LD_L_SET_4_off_IY_d , OP_BYTE , "LD L,SET 4,(IY+0%02Xh)", NULL }, + { SET_4_off_IY_d , OP_BYTE , "SET 4,(IY+0%02Xh)" , NULL }, + { LD_A_SET_4_off_IY_d , OP_BYTE , "LD A,SET 4,(IY+0%02Xh)", NULL }, + { LD_B_SET_5_off_IY_d , OP_BYTE , "LD B,SET 5,(IY+0%02Xh)", NULL }, + { LD_C_SET_5_off_IY_d , OP_BYTE , "LD C,SET 5,(IY+0%02Xh)", NULL }, + { LD_D_SET_5_off_IY_d , OP_BYTE , "LD D,SET 5,(IY+0%02Xh)", NULL }, + { LD_E_SET_5_off_IY_d , OP_BYTE , "LD E,SET 5,(IY+0%02Xh)", NULL }, + { LD_H_SET_5_off_IY_d , OP_BYTE , "LD H,SET 5,(IY+0%02Xh)", NULL }, + { LD_L_SET_5_off_IY_d , OP_BYTE , "LD L,SET 5,(IY+0%02Xh)", NULL }, + { SET_5_off_IY_d , OP_BYTE , "SET 5,(IY+0%02Xh)" , NULL }, + { LD_A_SET_5_off_IY_d , OP_BYTE , "LD A,SET 5,(IY+0%02Xh)", NULL }, + { LD_B_SET_6_off_IY_d , OP_BYTE , "LD B,SET 6,(IY+0%02Xh)", NULL }, + { LD_C_SET_6_off_IY_d , OP_BYTE , "LD C,SET 6,(IY+0%02Xh)", NULL }, + { LD_D_SET_6_off_IY_d , OP_BYTE , "LD D,SET 6,(IY+0%02Xh)", NULL }, + { LD_E_SET_6_off_IY_d , OP_BYTE , "LD E,SET 6,(IY+0%02Xh)", NULL }, + { LD_H_SET_6_off_IY_d , OP_BYTE , "LD H,SET 6,(IY+0%02Xh)", NULL }, + { LD_L_SET_6_off_IY_d , OP_BYTE , "LD L,SET 6,(IY+0%02Xh)", NULL }, + { SET_6_off_IY_d , OP_BYTE , "SET 6,(IY+0%02Xh)" , NULL }, + { LD_A_SET_6_off_IY_d , OP_BYTE , "LD A,SET 6,(IY+0%02Xh)", NULL }, + { LD_B_SET_7_off_IY_d , OP_BYTE , "LD B,SET 7,(IY+0%02Xh)", NULL }, + { LD_C_SET_7_off_IY_d , OP_BYTE , "LD C,SET 7,(IY+0%02Xh)", NULL }, + { LD_D_SET_7_off_IY_d , OP_BYTE , "LD D,SET 7,(IY+0%02Xh)", NULL }, + { LD_E_SET_7_off_IY_d , OP_BYTE , "LD E,SET 7,(IY+0%02Xh)", NULL }, + { LD_H_SET_7_off_IY_d , OP_BYTE , "LD H,SET 7,(IY+0%02Xh)", NULL }, + { LD_L_SET_7_off_IY_d , OP_BYTE , "LD L,SET 7,(IY+0%02Xh)", NULL }, + { SET_7_off_IY_d , OP_BYTE , "SET 7,(IY+0%02Xh)" , NULL }, + { LD_A_SET_7_off_IY_d , OP_BYTE , "LD A,SET 7,(IY+0%02Xh)", NULL } +} }; + + diff --git a/emul/rc2014/Makefile b/emul/rc2014/Makefile index 6621372..7715de6 100644 --- a/emul/rc2014/Makefile +++ b/emul/rc2014/Makefile @@ -1,4 +1,4 @@ -EXTOBJS = ../emul.o ../libz80/libz80.o +EXTOBJS = ../emul.o ../z80.o OBJS = sio.o acia.o sdc.o classic.o TARGET = classic diff --git a/emul/sms/Makefile b/emul/sms/Makefile index d35d462..d4366ef 100644 --- a/emul/sms/Makefile +++ b/emul/sms/Makefile @@ -1,4 +1,4 @@ -EXTOBJS = ../emul.o ../libz80/libz80.o +EXTOBJS = ../emul.o ../z80.o OBJS = sms.o vdp.o port.o pad.o kbd.o TARGET = sms CFLAGS += `pkg-config --cflags xcb` diff --git a/emul/ti/Makefile b/emul/ti/Makefile index a25bd01..1a9752a 100644 --- a/emul/ti/Makefile +++ b/emul/ti/Makefile @@ -1,4 +1,4 @@ -EXTOBJS = ../emul.o ../libz80/libz80.o +EXTOBJS = ../emul.o ../z80.o OBJS = ti84.o t6a04.o kbd.o TARGET = ti84 CFLAGS += `pkg-config --cflags xcb` diff --git a/emul/z80.c b/emul/z80.c new file mode 100644 index 0000000..df45cea --- /dev/null +++ b/emul/z80.c @@ -0,0 +1,885 @@ +// This unit has been copied from libz80 into Collapse OS and was slighly changed +/* ========================================================= + * libz80 - Z80 emulation library + * ========================================================= + * + * (C) Gabriel Gambetta (gabriel.gambetta@gmail.com) 2000 - 2012 + * + * Version 2.1.0 + * + * --------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "z80.h" +#include "string.h" + + +#define BR (ctx->R1.br) +#define WR (ctx->R1.wr) + +#define SETFLAG(F) setFlag(ctx, F) +#define RESFLAG(F) resFlag(ctx, F) +#define GETFLAG(F) getFlag(ctx, F) + +#define VALFLAG(F,V) valFlag(ctx, F, V) + + +/* --------------------------------------------------------- + * Flag tricks + * --------------------------------------------------------- + * + * To avoid repeating entries in the spec files, many operations that look similar are treated as special cases + * of a more general operation. + * + * For example, ADD and ADC are similar in syntax and operation - the difference is that ADC takes the carry flag + * into account. + * + * So we define a general operation doArithmetic(...) which accepts a boolean parameter specifying whether to do + * a Carry-operation or not. Then, when we parse, we can say + * + * (ADD|ADC) .... + * doArithmetic(FLAG_FOR_%1) + * + * and everything works fine. + * + */ + +/* Flags for doIncDec() */ +static const int ID_INC = 0; +static const int ID_DEC = 1; + +/* Flags for enable / disable interrupts */ +static const int IE_DI = 0; +static const int IE_EI = 1; + +/* Flags for doSetRes() */ +static const int SR_RES = 0; +static const int SR_SET = 1; + +/* Flags for logical / arithmetic operations */ +static const int IA_L = 0; +static const int IA_A = 1; + +/* Flags for doArithmetic() - F1 = withCarry, F2 = isSub */ +static const int F1_ADC = 1; +static const int F1_SBC = 1; +static const int F1_ADD = 0; +static const int F1_SUB = 0; + +static const int F2_ADC = 0; +static const int F2_SBC = 1; +static const int F2_ADD = 0; +static const int F2_SUB = 1; + +/* Increment or decrement R, preserving bit 7 */ +#define INCR (ctx->R = (ctx->R & 0x80) | ((ctx->R + 1) & 0x7f)) +#define DECR (ctx->R = (ctx->R & 0x80) | ((ctx->R - 1) & 0x7f)) + + +/* --------------------------------------------------------- + * The opcode implementations + * --------------------------------------------------------- + */ +#include "opcodes_decl.h" + +typedef enum +{ + OP_NONE, + OP_BYTE, + OP_OFFSET, + OP_WORD +} Z80OperandType; + +typedef void (*Z80OpcodeFunc) (Z80Context* ctx); + +struct Z80OpcodeEntry +{ + Z80OpcodeFunc func; + + int operand_type; + char* format; + + struct Z80OpcodeTable* table; +}; + + +struct Z80OpcodeTable +{ + int opcode_offset; + struct Z80OpcodeEntry entries[256]; +}; + + +#include "opcodes_table.h" + + +/* --------------------------------------------------------- + * Data operations + * --------------------------------------------------------- + */ +static void write8 (Z80Context* ctx, ushort addr, byte val) +{ + ctx->tstates += 3; + ctx->memWrite(ctx->memParam, addr, val); +} + + +static void write16 (Z80Context* ctx, ushort addr, ushort val) +{ + write8(ctx, addr, val); + write8(ctx, addr + 1, val >> 8); +} + + +static byte read8 (Z80Context* ctx, ushort addr) +{ + ctx->tstates += 3; + return ctx->memRead(ctx->memParam, addr); +} + + +static ushort read16 (Z80Context* ctx, ushort addr) +{ + byte lsb = read8(ctx, addr); + byte msb = read8(ctx, addr + 1); + return msb << 8 | lsb; +} + + +static byte ioRead (Z80Context* ctx, ushort addr) +{ + ctx->tstates += 4; + return ctx->ioRead(ctx->ioParam, addr); +} + + +static void ioWrite (Z80Context* ctx, ushort addr, byte val) +{ + ctx->tstates += 4; + ctx->ioWrite(ctx->ioParam, addr, val); +} + + +/* --------------------------------------------------------- + * Flag operations + * --------------------------------------------------------- + */ + +/** Sets a flag */ +static void setFlag(Z80Context* ctx, Z80Flags flag) +{ + BR.F |= flag; +} + +/** Resets a flag */ +static void resFlag(Z80Context* ctx, Z80Flags flag) +{ + BR.F &= ~flag; +} + +/** Puts a value in a flag */ +static void valFlag(Z80Context* ctx, Z80Flags flag, int val) +{ + if (val) + SETFLAG(flag); + else + RESFLAG(flag); +} + +/** Returns a flag */ +static int getFlag(Z80Context* ctx, Z80Flags flag) +{ + return (BR.F & flag) != 0; +} + + +/* --------------------------------------------------------- + * Flag adjustments + * --------------------------------------------------------- + */ + +static int parityBit[256] = { + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, + 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1 }; + + +static void adjustFlags (Z80Context* ctx, byte val) +{ + VALFLAG(F_5, (val & F_5) != 0); + VALFLAG(F_3, (val & F_3) != 0); +} + + +static void adjustFlagSZP (Z80Context* ctx, byte val) +{ + VALFLAG(F_S, (val & 0x80) != 0); + VALFLAG(F_Z, (val == 0)); + VALFLAG(F_PV, parityBit[val]); +} + + +/* Adjust flags after AND, OR, XOR */ +static void adjustLogicFlag (Z80Context* ctx, int flagH) +{ + VALFLAG(F_S, (BR.A & 0x80) != 0); + VALFLAG(F_Z, (BR.A == 0)); + VALFLAG(F_H, flagH); + VALFLAG(F_N, 0); + VALFLAG(F_C, 0); + VALFLAG(F_PV, parityBit[BR.A]); + + adjustFlags(ctx, BR.A); +} + + +/* --------------------------------------------------------- + * Condition checks + * --------------------------------------------------------- + */ + +typedef enum +{ + C_, + C_Z, + C_NZ, + C_C, + C_NC, + C_M, + C_P, + C_PE, + C_PO +} Z80Condition; + +static int condition(Z80Context* ctx, Z80Condition cond) +{ + if (cond == C_) + return 1; + + if (cond == C_Z) + return GETFLAG(F_Z); + + if (cond == C_NZ) + return !GETFLAG(F_Z); + + if (cond == C_C) + return GETFLAG(F_C); + + if (cond == C_NC) + return !GETFLAG(F_C); + + if (cond == C_M) + return GETFLAG(F_S); + + if (cond == C_P) + return !GETFLAG(F_S); + + if (cond == C_PE) + return GETFLAG(F_PV); + +/* if (cond == C_PO)*/ + return !GETFLAG(F_PV); +} + + +/* --------------------------------------------------------- + * Generic operations + * --------------------------------------------------------- + */ + + +static int doComplement(byte v) +{ + if ((v & 0x80) == 0) + return v; + + v = ~v; + v &= 0x7F; + v++; + + return -v; +} + + +/** Do an arithmetic operation (ADD, SUB, ADC, SBC y CP) */ +static byte doArithmetic (Z80Context* ctx, byte value, int withCarry, int isSub) +{ + ushort res; /* To detect carry */ + + if (isSub) + { + SETFLAG(F_N); + VALFLAG(F_H, (((BR.A & 0x0F) - (value & 0x0F)) & 0x10) != 0); + res = BR.A - value; + if (withCarry && GETFLAG(F_C)) + res--; + } + else + { + RESFLAG(F_N); + VALFLAG(F_H, (((BR.A & 0x0F) + (value & 0x0F)) & 0x10) != 0); + res = BR.A + value; + if (withCarry && GETFLAG(F_C)) + res++; + } + VALFLAG(F_S, ((res & 0x80) != 0)); + VALFLAG(F_C, ((res & 0x100) != 0)); + VALFLAG(F_Z, ((res & 0xff) == 0)); + int minuend_sign = BR.A & 0x80; + int subtrahend_sign = value & 0x80; + int result_sign = res & 0x80; + int overflow; + if(isSub) + overflow = minuend_sign != subtrahend_sign && result_sign != minuend_sign; + else + overflow = minuend_sign == subtrahend_sign && result_sign != minuend_sign; + VALFLAG(F_PV, overflow); + adjustFlags(ctx, res); + + return (byte)(res & 0xFF); +} + + +/* Do a 16-bit addition, setting the appropriate flags. */ +static ushort doAddWord(Z80Context* ctx, ushort a1, ushort a2, int withCarry, int isSub) +{ + if(withCarry && GETFLAG(F_C)) + a2++; + int sum = a1; + if(isSub) + { + sum -= a2; + VALFLAG(F_H, ((a1 & 0x0fff) - (a2 & 0x0fff)) & 0x1000); + } + else + { + sum += a2; + VALFLAG(F_H, ((a1 & 0x0fff) + (a2 & 0x0fff)) & 0x1000); + } + VALFLAG(F_C, sum & 0x10000); + if(withCarry || isSub) + { + int minuend_sign = a1 & 0x8000; + int subtrahend_sign = a2 & 0x8000; + int result_sign = sum & 0x8000; + int overflow; + if(isSub) + overflow = minuend_sign != subtrahend_sign && result_sign != minuend_sign; + else + overflow = minuend_sign == subtrahend_sign && result_sign != minuend_sign; + VALFLAG(F_PV, overflow); + VALFLAG(F_S, (sum & 0x8000) != 0); + VALFLAG(F_Z, (sum & 0xFFFF) == 0); + } + VALFLAG(F_N, isSub); + adjustFlags(ctx, sum >> 8); + return sum; +} + + +static void doAND (Z80Context* ctx, byte value) +{ + BR.A &= value; + adjustLogicFlag(ctx, 1); +} + + +static void doOR (Z80Context* ctx, byte value) +{ + BR.A |= value; + adjustLogicFlag(ctx, 0); +} + + +static void doXOR (Z80Context* ctx, byte value) +{ + BR.A ^= value; + adjustLogicFlag(ctx, 0); +} + + +static void doBIT (Z80Context* ctx, int b, byte val) +{ + if (val & (1 << b)) + RESFLAG(F_Z | F_PV); + else + SETFLAG(F_Z | F_PV); + + SETFLAG(F_H); + RESFLAG(F_N); + + RESFLAG(F_S); + if ((b == 7) && !GETFLAG(F_Z)) + SETFLAG(F_S); +} + + +static void doBIT_r(Z80Context* ctx, int b, byte val) +{ + doBIT(ctx, b, val); + VALFLAG(F_5, val & F_5); + VALFLAG(F_3, val & F_3); +} + + +static void doBIT_indexed(Z80Context* ctx, int b, ushort address) +{ + byte val = read8(ctx, address); + doBIT(ctx, b, val); + VALFLAG(F_5, (address >> 8) & F_5); + VALFLAG(F_3, (address >> 8) & F_3); +} + + +byte doSetRes (Z80Context* ctx, int bit, int pos, byte val) +{ + if (bit) + val |= (1 << pos); + else + val &= ~(1 << pos); + return val; +} + + + +static byte doIncDec (Z80Context* ctx, byte val, int isDec) +{ + if (isDec) + { + VALFLAG(F_PV, (val & 0x80) && !((val - 1) & 0x80)); + val--; + VALFLAG(F_H, (val & 0x0F) == 0x0F); + } + else + { + VALFLAG(F_PV, !(val & 0x80) && ((val + 1) & 0x80)); + val++; + VALFLAG(F_H, !(val & 0x0F)); + } + + VALFLAG(F_S, ((val & 0x80) != 0)); + VALFLAG(F_Z, (val == 0)); + VALFLAG(F_N, isDec); + + adjustFlags(ctx, val); + + return val; +} + + +static byte doRLC (Z80Context* ctx, int adjFlags, byte val) +{ + VALFLAG(F_C, (val & 0x80) != 0); + val <<= 1; + val |= (byte)GETFLAG(F_C); + + adjustFlags(ctx, val); + RESFLAG(F_H | F_N); + + if (adjFlags) + adjustFlagSZP(ctx, val); + + return val; +} + + +static byte doRL (Z80Context* ctx, int adjFlags, byte val) +{ + int CY = GETFLAG(F_C); + VALFLAG(F_C, (val & 0x80) != 0); + val <<= 1; + val |= (byte)CY; + + adjustFlags(ctx, val); + RESFLAG(F_H | F_N); + + if (adjFlags) + adjustFlagSZP(ctx, val); + + return val; +} + + +static byte doRRC (Z80Context* ctx, int adjFlags, byte val) +{ + VALFLAG(F_C, (val & 0x01) != 0); + val >>= 1; + val |= ((byte)GETFLAG(F_C) << 7); + + adjustFlags(ctx, val); + RESFLAG(F_H | F_N); + + if (adjFlags) + adjustFlagSZP(ctx, val); + + return val; +} + + +static byte doRR (Z80Context* ctx, int adjFlags, byte val) +{ + int CY = GETFLAG(F_C); + VALFLAG(F_C, (val & 0x01)); + val >>= 1; + val |= (CY << 7); + + adjustFlags(ctx, val); + RESFLAG(F_H | F_N); + + if (adjFlags) + adjustFlagSZP(ctx, val); + + return val; +} + + +static byte doSL (Z80Context* ctx, byte val, int isArith) +{ + VALFLAG(F_C, (val & 0x80) != 0); + val <<= 1; + + if (!isArith) + val |= 1; + + adjustFlags(ctx, val); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, val); + + return val; +} + + +static byte doSR (Z80Context* ctx, byte val, int isArith) +{ + int b = val & 0x80; + + VALFLAG(F_C, (val & 0x01) != 0); + val >>= 1; + + if (isArith) + val |= b; + + adjustFlags(ctx, val); + RESFLAG(F_H | F_N); + adjustFlagSZP(ctx, val); + + return val; +} + + +static void doPush (Z80Context* ctx, ushort val) +{ + WR.SP--; + WR.SP--; + write16(ctx, WR.SP, val); +} + + +static ushort doPop (Z80Context* ctx) +{ + ushort val; + val = read16(ctx, WR.SP); + WR.SP++; + WR.SP++; + return val; +} + + +static byte doCP_HL(Z80Context * ctx) +{ + byte val = read8(ctx, WR.HL); + byte result = doArithmetic(ctx, val, 0, 1); + adjustFlags(ctx, val); + return result; +} + + +/* The DAA opcode + * According to the value in A and the flags set, add a value to A + * This algorithm taken from: + * http://www.worldofspectrum.org/faq/reference/z80reference.htm + * and verified against the specification in the Zilog + * Z80 Family CPU User Manual, rev. 04, Dec. 2004, pp. 166-167 + */ + +static void doDAA(Z80Context * ctx) { + int correction_factor = 0x00; + int carry = 0; + if(BR.A > 0x99 || GETFLAG(F_C)) { + correction_factor |= 0x60; + carry = 1; + } + if((BR.A & 0x0f) > 9 || GETFLAG(F_H)) + correction_factor |= 0x06; + int a_before = BR.A; + if(GETFLAG(F_N)) + BR.A -= correction_factor; + else + BR.A += correction_factor; + VALFLAG(F_H, (a_before ^ BR.A) & 0x10); + VALFLAG(F_C, carry); + VALFLAG(F_S, (BR.A & 0x80) != 0); + VALFLAG(F_Z, (BR.A == 0)); + VALFLAG(F_PV, parityBit[BR.A]); + adjustFlags(ctx, BR.A); +} + +#include "opcodes_impl.c" + + +/* --------------------------------------------------------- + * The top-level functions + * --------------------------------------------------------- + */ + + +static void do_execute(Z80Context* ctx) +{ + struct Z80OpcodeTable* current = &opcodes_main; + struct Z80OpcodeEntry* entries = current->entries; + Z80OpcodeFunc func; + + byte opcode; + int offset = 0; + do + { + if (ctx->exec_int_vector) + { + opcode = ctx->int_vector; + ctx->tstates += 6; + } + else + { + opcode = read8(ctx, ctx->PC + offset); + ctx->PC++; + ctx->tstates += 1; + } + + INCR; + func = entries[opcode].func; + if (func != NULL) + { + ctx->PC -= offset; + func(ctx); + ctx->PC += offset; + break; + } + else if (entries[opcode].table != NULL) + { + current = entries[opcode].table; + entries = current->entries; + offset = current->opcode_offset; + if (offset > 0) + DECR; + } + + else + { + /* NOP */ + break; + } + } while(1); +} + + +static void unhalt(Z80Context* ctx) +{ + if (ctx->halted) + { + ctx->halted = 0; + ctx->PC++; + } +} + + +static void do_nmi(Z80Context* ctx) +{ + unhalt(ctx); + ctx->IFF2 = ctx->IFF1; + ctx->IFF1 = 0; + doPush(ctx, ctx->PC); + ctx->PC = 0x0066; + ctx->nmi_req = 0; + ctx->tstates += 5; +} + + +static void do_int(Z80Context* ctx) +{ + unhalt(ctx); + ctx->IFF1 = 0; + ctx->IFF2 = 0; + ctx->int_req = 0; + if (ctx->IM == 0) + { + ctx->exec_int_vector = 1; + do_execute(ctx); + ctx->exec_int_vector = 0; + } + else if (ctx->IM == 1) + { + doPush(ctx, ctx->PC); + ctx->PC = 0x0038; + ctx->tstates += 7; + } + else if (ctx->IM == 2) + { + doPush(ctx, ctx->PC); + ushort vector_address = (ctx->I << 8) | ctx->int_vector; + ctx->PC = read16(ctx, vector_address); + ctx->tstates += 7; + } +} + + +void Z80Execute (Z80Context* ctx) +{ + if (ctx->nmi_req) + do_nmi(ctx); + else if (ctx->int_req && !ctx->defer_int && ctx->IFF1) + do_int(ctx); + else + { + ctx->defer_int = 0; + do_execute(ctx); + } +} + + +unsigned Z80ExecuteTStates(Z80Context* ctx, unsigned tstates) +{ + ctx->tstates = 0; + while (ctx->tstates < tstates) + Z80Execute(ctx); + return ctx->tstates; +} + + +void Z80Debug (Z80Context* ctx, char* dump, char* decode) +{ + char tmp[20]; + struct Z80OpcodeTable* current = &opcodes_main; + struct Z80OpcodeEntry* entries = current->entries; + char* fmt; + byte opcode; + ushort parm; + int offset = 0; + int PC = ctx->PC; + int size = 0; + + if (dump) + dump[0] = 0; + + if (decode) + decode[0] = 0; + + do + { + opcode = read8(ctx, PC + offset); + size++; + + PC++; + fmt = entries[opcode].format; + if (fmt != NULL) + { + PC -= offset; + parm = read16(ctx, PC); + + if (entries[opcode].operand_type == OP_NONE) + size++; + else + size += 2; + if (entries[opcode].operand_type != OP_WORD) + { + parm &= 0xFF; + size--; + } + + if (decode) + sprintf(decode, fmt, parm); + + PC += offset; + break; + } + else if (entries[opcode].table != NULL) + { + current = entries[opcode].table; + entries = current->entries; + offset = current->opcode_offset; + } + + else + { + if (decode != NULL) + strcpy(decode, "NOP (ignored)"); + break; + } + } while(1); + + if (dump) + { + for (offset = 0; offset < size; offset++) + { + sprintf(tmp, "%02X", read8(ctx, ctx->PC + offset)); + strcat(dump, tmp); + } + } +} + + +void Z80RESET (Z80Context* ctx) +{ + ctx->PC = 0x0000; + BR.F = 0; + ctx->IM = 0; + ctx->IFF1 = ctx->IFF2 = 0; + ctx->R = 0; + ctx->I = 0; + ctx->halted = 0; + ctx->tstates = 0; + ctx->nmi_req = 0; + ctx->int_req = 0; + ctx->defer_int = 0; + ctx->exec_int_vector = 0; +} + + +void Z80INT (Z80Context* ctx, byte value) +{ + ctx->int_req = 1; + ctx->int_vector = value; +} + + +void Z80NMI (Z80Context* ctx) +{ + ctx->nmi_req = 1; +} + diff --git a/emul/z80.h b/emul/z80.h new file mode 100644 index 0000000..1332802 --- /dev/null +++ b/emul/z80.h @@ -0,0 +1,163 @@ +// This unit has been copied from libz80 into Collapse OS and was slighly changed +/* ============================================================================= + * libz80 - Z80 emulation library + * ============================================================================= + * + * (C) Gabriel Gambetta (gabriel.gambetta@gmail.com) 2000 - 2012 + * + * Version 2.1.0 + * + * ----------------------------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#pragma once + +#include + +typedef unsigned short ushort; +typedef unsigned char byte; + + +/** Function type to emulate data read. */ +typedef byte (*Z80DataIn) (int param, ushort address); + + +/** Function type to emulate data write. */ +typedef void (*Z80DataOut) (int param, ushort address, byte data); + + +/** + * A Z80 register set. + * An union is used since we want independent access to the high and low bytes of the 16-bit registers. + */ +typedef union +{ + /** Word registers. */ + struct + { + ushort AF, BC, DE, HL, IX, IY, SP; + } wr; + + /** Byte registers. Note that SP can't be accessed partially. */ + struct + { + byte F, A, C, B, E, D, L, H, IXl, IXh, IYl, IYh; + } br; +} Z80Regs; + + +/** The Z80 flags */ +typedef enum +{ + F_C = 1, /**< Carry */ + F_N = 2, /**< Sub / Add */ + F_PV = 4, /**< Parity / Overflow */ + F_3 = 8, /**< Reserved */ + F_H = 16, /**< Half carry */ + F_5 = 32, /**< Reserved */ + F_Z = 64, /**< Zero */ + F_S = 128 /**< Sign */ +} Z80Flags; + + +/** A Z80 execution context. */ +typedef struct +{ + Z80Regs R1; /**< Main register set (R) */ + Z80Regs R2; /**< Alternate register set (R') */ + ushort PC; /**< Program counter */ + byte R; /**< Refresh */ + byte I; + byte IFF1; /**< Interrupt Flipflop 1 */ + byte IFF2; /**< Interrupt Flipflop 2 */ + byte IM; /**< Instruction mode */ + + Z80DataIn memRead; + Z80DataOut memWrite; + int memParam; + + Z80DataIn ioRead; + Z80DataOut ioWrite; + int ioParam; + + byte halted; + unsigned tstates; + + /* Below are implementation details which may change without + * warning; they should not be relied upon by any user of this + * library. + */ + + /* If true, an NMI has been requested. */ + + byte nmi_req; + + /* If true, a maskable interrupt has been requested. */ + + byte int_req; + + /* If true, defer checking maskable interrupts for one + * instruction. This is used to keep an interrupt from happening + * immediately after an IE instruction. */ + + byte defer_int; + + /* When a maskable interrupt has been requested, the interrupt + * vector. For interrupt mode 1, it's the opcode to execute. For + * interrupt mode 2, it's the LSB of the interrupt vector address. + * Not used for interrupt mode 0. + */ + + byte int_vector; + + /* If true, then execute the opcode in int_vector. */ + + byte exec_int_vector; + +} Z80Context; + + +/** Execute the next instruction. */ +void Z80Execute (Z80Context* ctx); + +/** Execute enough instructions to use at least tstates cycles. + * Returns the number of tstates actually executed. Note: Resets + * ctx->tstates.*/ +unsigned Z80ExecuteTStates(Z80Context* ctx, unsigned tstates); + +/** Decode the next instruction to be executed. + * dump and decode can be NULL if such information is not needed + * + * @param dump A buffer which receives the hex dump + * @param decode A buffer which receives the decoded instruction + */ +void Z80Debug (Z80Context* ctx, char* dump, char* decode); + +/** Resets the processor. */ +void Z80RESET (Z80Context* ctx); + +/** Generates a hardware interrupt. + * Some interrupt modes read a value from the data bus; this value must be provided in this function call, even + * if the processor ignores that value in the current interrupt mode. + * + * @param value The value to read from the data bus + */ +void Z80INT (Z80Context* ctx, byte value); + + +/** Generates a non-maskable interrupt. */ +void Z80NMI (Z80Context* ctx); diff --git a/runtests.sh b/runtests.sh index 122bc40..1c6a990 100755 --- a/runtests.sh +++ b/runtests.sh @@ -1,7 +1,5 @@ #!/bin/sh -e -git submodule init -git submodule update git clean -fxd make -C tests