Also, remove needless argtype in CALL and RETmaster
@@ -1,5 +1,5 @@ | |||||
: OP1 CREATE C, DOES> C@ A, ; | : OP1 CREATE C, DOES> C@ A, ; | ||||
0xc3 OP1 RETn, 0xfa OP1 CLI, 0xfb OP1 STI, | |||||
0xc3 OP1 RET, 0xfa OP1 CLI, 0xfb OP1 STI, | |||||
0xf4 OP1 HLT, 0xfc OP1 CLD, 0xfd OP1 STD, | 0xf4 OP1 HLT, 0xfc OP1 CLD, 0xfd OP1 STD, | ||||
0x90 OP1 NOP, 0x98 OP1 CBW, | 0x90 OP1 NOP, 0x98 OP1 CBW, | ||||
0xf3 OP1 REPZ, 0xf2 OP1 REPNZ, 0xac OP1 LODSB, | 0xf3 OP1 REPZ, 0xf2 OP1 REPNZ, 0xac OP1 LODSB, | ||||
@@ -9,7 +9,7 @@ | |||||
( no argument, jumps with relative addrs are special ) | ( no argument, jumps with relative addrs are special ) | ||||
0xeb OP1 JMPs, 0xe9 OP1 JMPn, 0x74 OP1 JZ, | 0xeb OP1 JMPs, 0xe9 OP1 JMPn, 0x74 OP1 JZ, | ||||
0x75 OP1 JNZ, 0x72 OP1 JC, 0x73 OP1 JNC, | 0x75 OP1 JNZ, 0x72 OP1 JC, 0x73 OP1 JNC, | ||||
0xe8 OP1 CALLn, | |||||
0xe8 OP1 CALL, | |||||
: OP1r CREATE C, DOES> C@ + A, ; | : OP1r CREATE C, DOES> C@ + A, ; | ||||
0x40 OP1r INCx, 0x48 OP1r DECx, | 0x40 OP1r INCx, 0x48 OP1r DECx, | ||||
@@ -8,4 +8,4 @@ | |||||
: RPCn, PC - 2- A,, ; | : RPCn, PC - 2- A,, ; | ||||
: AGAIN, ( BREAK?, ) RPCs, ; | : AGAIN, ( BREAK?, ) RPCs, ; | ||||
( Use RPCx with appropriate JMP/CALL op. Example: | ( Use RPCx with appropriate JMP/CALL op. Example: | ||||
JMPs, 0x42 RPCs, or CALLn, 0x1234 RPCn, ) | |||||
JMPs, 0x42 RPCs, or CALL, 0x1234 RPCn, ) |
@@ -4,4 +4,4 @@ | |||||
: ;CODE JMPn, 0x1a ( next ) RPCn, ; | : ;CODE JMPn, 0x1a ( next ) RPCn, ; | ||||
VARIABLE lblchkPS | VARIABLE lblchkPS | ||||
: chkPS, ( sz -- ) | : chkPS, ( sz -- ) | ||||
CX SWAP 2 * MOVxI, CALLn, lblchkPS @ RPCn, ; | |||||
CX SWAP 2 * MOVxI, CALL, lblchkPS @ RPCn, ; |
@@ -1,7 +1,7 @@ | |||||
lblchkPS BSET ( CX -> expected size ) | lblchkPS BSET ( CX -> expected size ) | ||||
AX PS_ADDR MOVxI, AX SP SUBxx, 2 SUBAXI, ( CALL adjust ) | AX PS_ADDR MOVxI, AX SP SUBxx, 2 SUBAXI, ( CALL adjust ) | ||||
AX CX CMPxx, | AX CX CMPxx, | ||||
IFNC, ( we're good ) RETn, THEN, | |||||
IFNC, ( we're good ) RET, THEN, | |||||
( underflow ) DI 0x06 MOVxm, JMPs, lblexec @ RPCs, | ( underflow ) DI 0x06 MOVxm, JMPs, lblexec @ RPCs, | ||||
PC 3 - ORG @ 1+ ! ( main ) | PC 3 - ORG @ 1+ ! ( main ) | ||||
@@ -11,6 +11,6 @@ CODE OVER ( a b -- a b a ) 2 chkPS, | |||||
DI SP MOVxx, AX [DI] 2 MOVx[]+, AX PUSHx, ;CODE | DI SP MOVxx, AX [DI] 2 MOVx[]+, AX PUSHx, ;CODE | ||||
CODE PICK | CODE PICK | ||||
DI POPx, DI SHLx1, ( x2 ) | DI POPx, DI SHLx1, ( x2 ) | ||||
CX DI MOVxx, CX 2 ADDxi, CALLn, lblchkPS @ RPCn, | |||||
CX DI MOVxx, CX 2 ADDxi, CALL, lblchkPS @ RPCn, | |||||
DI SP ADDxx, DI [DI] MOVx[], DI PUSHx, | DI SP ADDxx, DI [DI] MOVx[], DI PUSHx, | ||||
;CODE | ;CODE |
@@ -1,5 +1,5 @@ | |||||
CODE (roll) ( "2 3 4 5 4 --> 2 4 5 5". See B311 ) | CODE (roll) ( "2 3 4 5 4 --> 2 4 5 5". See B311 ) | ||||
CX POPx, CX 2 ADDxi, CALLn, lblchkPS @ RPCn, CX 2 SUBxi, | |||||
CX POPx, CX 2 ADDxi, CALL, lblchkPS @ RPCn, CX 2 SUBxi, | |||||
SI SP MOVxx, SI CX ADDxx, | SI SP MOVxx, SI CX ADDxx, | ||||
DI SI MOVxx, DI 2 ADDxi, STD, REPZ, MOVSB, | DI SI MOVxx, DI 2 ADDxi, STD, REPZ, MOVSB, | ||||
;CODE | ;CODE | ||||
@@ -158,7 +158,38 @@ For jumps, it's special. 's' is SHORT, 'n' is NEAR, 'f' is FAR. | |||||
# 8086 Instructions list | # 8086 Instructions list | ||||
TODO | |||||
r -> AL BL CL DL AH BH CH DX | |||||
x -> AX BX CX DX SP BP SI DI | |||||
s -> ES CS SS DS | |||||
[] -> [SI] [DI] [BP] [BX] [BX+SI] [BX+DI] [BP+SI] [BP+DI] | |||||
RET CLI STI HLT CLD STD NOP CBW REPZ REPNZ | |||||
LODSB LODSW CMPSB SMPSW MOVSB MOVSW SCASB SCASW STOSB STOSW | |||||
CALL J[Z,NZ,C,NC] JMP[s,n,r,f] | |||||
INC[r,x,[w],[b],[w]+,[b]+] | |||||
DEC[r,x,[w],[b],[w]+,[b]+] | |||||
POP[x,[w],[w]+] | |||||
PUSH[x,[w],[w]+,s] | |||||
MUL[r,x] | |||||
DIV[r,x] | |||||
XOR[rr,xx] | |||||
OR[rr,xx] | |||||
AND[rr,xx,ALi,AXI] | |||||
ADD[rr,xx,ALi,AXI,xi] | |||||
SUB[rr,xx,ALi,AXI,xi] | |||||
INT | |||||
CMP[rr,xx,r[],x[],r[]+,x[]+] | |||||
MOV[rr,xx,r[],x[],[]r,[]x,r[]+,x[]+,[]+r,[]+x,ri,xI,sx,rm,xm | |||||
mr,mx] | |||||
("1" means "shift by 1", "CL" means "shift by CL") | |||||
ROL[r1,x1,rCL,xCL] | |||||
ROR[r1,x1,rCL,xCL] | |||||
SHL[r1,x1,rCL,xCL] | |||||
SHR[r1,x1,rCL,xCL] | |||||
# AVR assembler | # AVR assembler | ||||