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@@ -8,13 +8,8 @@ You can't really keep pins high and low on an IO line. You need some kind of |
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intermediary between z80 IOs and SPI. |
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There are many ways to achieve this. This recipe explains how to build your own |
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hacked off SPI relay for the RC2014. It can then be used with `sdc.fs` to |
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drive a SD card. |
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## Goal |
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Read and write to a SD card from Collapse OS using a SPI relay of our own |
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design. |
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hacked off SPI relay for the RC2014. It can then be used with the SD Card |
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subsystem (B420) to drive a SD card. |
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## Gathering parts |
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@@ -60,7 +55,7 @@ To that end, I was heavily inspired by [this design][inspiration]. |
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This board uses port `4` for SPI data, port `5` to pull `CS` low and port `6` |
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to pull it high. Port `7` is unused but monopolized by the card. |
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Little advice: If you make your own design, double check propagation delays! |
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Advice 1: If you make your own design, double check propagation delays! |
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Some NAND gates, such as the 4093, are too slow to properly respond within |
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a 300ns limit. For example, in my own prototype, I use a 4093 because that's |
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what I have in inventory. For the `CS` flip-flop, the propagation delay doesn't |
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@@ -68,6 +63,14 @@ matter. However, it *does* matter for the `SELECT` line, so I don't follow my |
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own schematic with regards to the `M1` and `A2` lines and use two inverters |
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instead. |
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Advice 2: Make `SCK` polarity configurable at all 3 endpoints (the 595, the 165 |
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and SPI connector). Those jumpers will be useful when you need to mess with |
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polarity in your many tinkering sessions to come. |
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Advice 3: Make input `CLK` override-able. SD cards are plenty fast enough for us |
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to use the system clock, but you might want to interact with devices that |
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require a slower clock. |
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## Building your binary |
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The binary built in the base recipe doesn't have SDC drivers. You'll need to |
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@@ -77,7 +80,12 @@ our xcomp block (likely, B599). Open it. |
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First, we need drivers for the SPI relay. This is done by declaring `SPI_DATA`, |
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`SPI_CSLOW` and `SPI_CSHIGH`, which are respectively `4`, `5` and `6` in our |
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relay design. You can then load the driver with `596 LOAD`. This driver provides |
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relay design. We also need to define SPI_DELAY, which we keep to 2 NOPs because |
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we use the system clock: |
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: SPI_DELAY NOP, NOP, ; |
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You can then load the driver with `596 LOAD`. This driver provides |
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`(spix)`, `(spie)` and `(spid)` which are then used in the SDC driver. |
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The SDC driver is at B420. It gives you a load range. This means that what |
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