spi: add SPI_DELAY decl

AVR chips often run at less than z80's system clock. This means that
our SPI relay needs to have its own clock to properly communicate
with it. This means that the delay between OUT and IN can't be
hardcoded to 2 NOPs anymore. It needs to be configurable.

blk/595

@@ -7,6 +7,9 @@ the device, and writing to SPI_DATA is expected to initiate a
 byte exchange. The result of the exchange is excpected to be re-
 trieved by reading SPI_DATA.
 
-Provides the SPI relay protocol.
+You also need to define the exchange delay with SPI_DELAY. If
+SPI clock is the same as system clock, 2 NOPs are enough:
 
-Load driver with "596 LOAD".
+: SPI_DELAY NOP, NOP, ;
+
+Provides the SPI relay protocol. Load driver with "596 LOAD".

blk/596

@@ -3,7 +3,7 @@ CODE (spix) ( n -- n )
     chkPS,
     A L LDrr,
     SPI_DATA OUTiA,
-    NOP, NOP, ( let SPI relay breathe )
+    SPI_DELAY
     SPI_DATA INAi,
     L A LDrr,
     HL PUSH,

recipes/rc2014/sdcard.md

@@ -8,13 +8,8 @@ You can't really keep pins high and low on an IO line. You need some kind of
 intermediary between z80 IOs and SPI.
 
 There are many ways to achieve this. This recipe explains how to build your own
-hacked off SPI relay for the RC2014. It can then be used with `sdc.fs` to
+hacked off SPI relay for the RC2014. It can then be used with the SD Card
-drive a SD card.
+subsystem (B420) to drive a SD card.
-
-## Goal
-
-Read and write to a SD card from Collapse OS using a SPI relay of our own
-design.
 
 ## Gathering parts
 
@@ -60,7 +55,7 @@ To that end, I was heavily inspired by [this design][inspiration].
 This board uses port `4` for SPI data, port `5` to pull `CS` low and port `6`
 to pull it high. Port `7` is unused but monopolized by the card.
 
-Little advice: If you make your own design, double check propagation delays!
+Advice 1: If you make your own design, double check propagation delays!
 Some NAND gates, such as the 4093, are too slow to properly respond within
 a 300ns limit. For example, in my own prototype, I use a 4093 because that's
 what I have in inventory. For the `CS` flip-flop, the propagation delay doesn't
@@ -68,6 +63,14 @@ matter. However, it *does* matter for the `SELECT` line, so I don't follow my
 own schematic with regards to the `M1` and `A2` lines and use two inverters
 instead.
 
+Advice 2: Make `SCK` polarity configurable at all 3 endpoints (the 595, the 165
+and SPI connector). Those jumpers will be useful when you need to mess with
+polarity in your many tinkering sessions to come.
+
+Advice 3: Make input `CLK` override-able. SD cards are plenty fast enough for us
+to use the system clock, but you might want to interact with devices that
+require a slower clock.
+
 ## Building your binary
 
 The binary built in the base recipe doesn't have SDC drivers. You'll need to
@@ -77,7 +80,12 @@ our xcomp block (likely, B599). Open it.
 
 First, we need drivers for the SPI relay. This is done by declaring `SPI_DATA`,
 `SPI_CSLOW` and `SPI_CSHIGH`, which are respectively `4`, `5` and `6` in our
-relay design. You can then load the driver with `596 LOAD`. This driver provides
+relay design. We also need to define SPI_DELAY, which we keep to 2 NOPs because
+we use the system clock:
+
+    : SPI_DELAY NOP, NOP, ;
+
+You can then load the driver with `596 LOAD`. This driver provides
 `(spix)`, `(spie)` and `(spid)` which are then used in the SDC driver.
 
 The SDC driver is at B420. It gives you a load range. This means that what