rc2014: we're almost getting there...

drv/acia.fs

@@ -24,44 +24,6 @@ ACIA_IO: IO port for the ACIA's data registers
 ( This means that if W> == R>, buffer is full.
   If R>+1 == W>, buffer is empty. )
 
-(entry) ~ACIA
-    AF PUSHqq,
-    HL PUSHqq,
-    DE PUSHqq,
-
-	( Read our character from ACIA into our BUFIDX )
-    ACIA_CTL INAn,
-    0x01 ANDn,   ( is ACIA rcv buf full? )
-    JRZ, L2 FWR ( end, no, wrong interrupt cause. )
-
-    ACIAW> @ LDHL(nn),
-    ( is it == to ACIAR>? )
-    DE ACIAR> @ LDdd(nn),
-    ( carry cleared from ANDn above )
-    DE SBCHLss,
-    JRZ, L3 FWR ( end, buffer full )
-
-    ( buffer not full, let's write )
-    ACIA_IO INAn,
-    (HL) A LDrr,
-
-    ( advance W> )
-    HL INCss,
-    DE ACIAR) @ LDdd(nn),
-    DE SUBHLss,
-    JRNZ, L4 FWR ( skip )
-    ( end of buffer reached )
-    ACIA( @ LDHL(nn),
-L4 FSET ( skip )
-    ACIAW> @ LD(nn)HL,
-L3 FSET L2 FSET ( end )
-
-    DE POPqq,
-    HL POPqq,
-    AF POPqq,
-    EI,
-    RETI,
-
 : ACIA$
     H@ DUP DUP ACIA( ! ACIAR> !
     1 + ACIAW> ! ( write index starts one position later )
@@ -76,9 +38,9 @@ L3 FSET L2 FSET ( end )
     0b10010110 ACIA_CTL PC!
 
 ( setup interrupt )
-    ( 51 == INTJUMP )
+    ( 4e == INTJUMP )
-    0xc3 0x51 RAM+ C! ( JP upcode )
+    0xc3 0x4e RAM+ C! ( JP upcode )
-    ['] ~ACIA 0x52 RAM+ !
+    ['] ~ACIA 0x4f RAM+ !
     (im1)
 ;
 

drv/acia.z80

@@ -0,0 +1,43 @@
+( Save ACIA ports from conf )
+ACIA_CTL
+: ACIA_CTL [ LITN ] ;
+ACIA_IO
+: ACIA_IO [ LITN ] ;
+
+(entry) ~ACIA
+    AF PUSHqq,
+    HL PUSHqq,
+    DE PUSHqq,
+
+	( Read our character from ACIA into our BUFIDX )
+    ACIA_CTL INAn,
+    0x01 ANDn,   ( is ACIA rcv buf full? )
+    JRZ, L2 FWR ( end, no, wrong interrupt cause. )
+
+    ACIAW> @ LDHL(nn),
+    ( is it == to ACIAR>? )
+    DE ACIAR> @ LDdd(nn),
+    ( carry cleared from ANDn above )
+    DE SBCHLss,
+    JRZ, L3 FWR ( end, buffer full )
+
+    ( buffer not full, let's write )
+    ACIA_IO INAn,
+    (HL) A LDrr,
+
+    ( advance W> )
+    HL INCss,
+    DE ACIAR) @ LDdd(nn),
+    DE SUBHLss,
+    JRNZ, L4 FWR ( skip )
+    ( end of buffer reached )
+    ACIA( @ LDHL(nn),
+L4 FSET ( skip )
+    ACIAW> @ LD(nn)HL,
+L3 FSET L2 FSET ( end )
+
+    DE POPqq,
+    HL POPqq,
+    AF POPqq,
+    EI,
+    RETI,

recipes/rc2014/Makefile

@@ -1,25 +1,31 @@
 TARGET = os.bin
 BASEDIR = ../..
-FDIR = $(BASEDIR)/emul/forth
+FDIR = $(BASEDIR)/forth
-STAGE1 = $(FDIR)/stage1
+EDIR = $(BASEDIR)/emul/forth
-FORTH0 = $(FDIR)/forth0.bin
+STAGE2 = $(EDIR)/stage2
 EMUL = $(BASEDIR)/emul/hw/rc2014/classic
-SRCS = core.fs str.fs parse.fs readln.fs fmt.fs
+PATHS = pre.fs \
-PATHS = conf.fs \
+	$(FDIR)/core.fs \
-	${SRCS:%=$(BASEDIR)/forth/%} \
+	$(FDIR)/str.fs \
+	$(FDIR)/parse.fs \
 	$(BASEDIR)/drv/acia.fs \
-	run.fs \
+	$(FDIR)/print.fs \
-	$(FDIR)/stop.fs
+	run.fs
 SLATEST = $(BASEDIR)/tools/slatest
+STRIPFC = $(BASEDIR)/tools/stripfc
 
 .PHONY: all
 all: $(TARGET) 
-$(TARGET): dict.bin $(FORTH0) $(SLATEST)
+$(TARGET): boot.bin z80c.bin $(SLATEST) $(PATHS)
-	cat $(FORTH0) dict.bin > $@
+	cat boot.bin z80c.bin > $@
 	$(SLATEST) $@
+	cat $(PATHS) | $(STRIPFC) >> $@
 
-dict.bin: conf.fs
+z80c.bin: boot.bin
-	cat $(PATHS) | $(STAGE1) > $@
+	cat conf.fs $(FDIR)/z80c.fs $(BASEDIR)/drv/acia.z80 $(FDIR)/icore.fs | $(STAGE2) | tee $@ > /dev/null
+
+boot.bin: conf.fs
+	cat conf.fs $(FDIR)/boot.fs | $(STAGE2) | tee $@ > /dev/null
 
 $(SLATEST):
 	$(MAKE) -C $(BASEDIR)/tools

recipes/rc2014/pre.fs

@@ -0,0 +1,3 @@
+96 RAM+ HERE !
+HERE @ 256 /MOD 8 PC! 8 PC!
+CURRENT @ 256 /MOD 8 PC! 8 PC!

recipes/rc2014/run.fs

@@ -1 +1 @@
-: INIT 5 5 PC! BYE ACIA$ INTERPRET ;
+ACIA$ LIT< hello (print) BYE