From a8e8204eba4940646a120962917ab3575ca47efc Mon Sep 17 00:00:00 2001
From: Virgil Dupras <hsoft@hardcoded.net>
Date: Thu, 14 May 2020 12:08:17 -0400
Subject: [PATCH] trs80: adapt recipe to single stage xcomp

---
 blk/490                 | 3 +--
 blk/492                 | 2 +-
 blk/498                 | 1 -
 blk/499                 | 2 +-
 blk/500                 | 2 +-
 recipes/trs80/Makefile  | 2 +-
 recipes/trs80/README.md | 6 +++---
 recipes/trs80/xcomp.fs  | 3 +--
 8 files changed, 9 insertions(+), 12 deletions(-)
 delete mode 100644 blk/498

diff --git a/blk/490 b/blk/490
index 2861bc2..64ad5e0 100644
--- a/blk/490
+++ b/blk/490
@@ -4,8 +4,7 @@ Support code for the TRS-80 recipe. Contains drivers for the
 keyboard, video and floppy. At the moment, they are thin layer
 over the drivers provided by TRSDOS' SVC.
 
-Load the Z80 words with "492 LOAD" and the high level part
-with "498 LOAD".
+Load with "492 LOAD".
 
 There is also the RECV program at B502 and the XCOMP unit at
 B504
diff --git a/blk/492 b/blk/492
index a127da9..dcc3342 100644
--- a/blk/492
+++ b/blk/492
@@ -1 +1 @@
-1 5 LOADR+
+1 8 LOADR+
diff --git a/blk/498 b/blk/498
deleted file mode 100644
index 8ed1836..0000000
--- a/blk/498
+++ /dev/null
@@ -1 +0,0 @@
-1 2 LOADR+
diff --git a/blk/499 b/blk/499
index ed4127d..a1bf643 100644
--- a/blk/499
+++ b/blk/499
@@ -1,4 +1,4 @@
-: _err ABORT" FDerr" ;
+: _err LIT" FDerr" ERR ;
 : _cylsec ( sec -- cs, return sector/cylinder for given secid )
     ( 4 256b sectors per block, 10 sec per cyl, 40 cyl max )
     10 /MOD ( sec cyl )
diff --git a/blk/500 b/blk/500
index e202cf4..d9aa0f1 100644
--- a/blk/500
+++ b/blk/500
@@ -2,6 +2,6 @@
 : FD! ['] @WRSEC SWAP FD@! ;
 : FD$ ['] FD@ BLK@* ! ['] FD! BLK!* ! ;
 
-: _err ABORT" *CLerr" ;
+: _err LIT" *CLerr" ERR ;
 : *CL< 0 BEGIN DROP 0x0238 @GET UNTIL ;
 : *CL> 0x0238 @PUT NOT IF _err THEN ;
diff --git a/recipes/trs80/Makefile b/recipes/trs80/Makefile
index 465b100..9292429 100644
--- a/recipes/trs80/Makefile
+++ b/recipes/trs80/Makefile
@@ -1,4 +1,4 @@
-TARGET = stage1.bin
+TARGET = os.bin
 EDIR = ../../emul
 STAGE = $(EDIR)/stage
 
diff --git a/recipes/trs80/README.md b/recipes/trs80/README.md
index 6883996..2476da0 100644
--- a/recipes/trs80/README.md
+++ b/recipes/trs80/README.md
@@ -67,10 +67,10 @@ kind of reception! You're gonna feel real badass about it too...
 
 * `_` is `CLEAR+ENTER`.
 
-## Building the stage 1
+## Building the binary
 
-You can start the process by building the stage 1 binary. Running `make` in
-this folder will yield a `stage1.bin` file. You'll need it later.
+You can build the binary to send to the TRS-80 with `make`, which will yield
+`os.bin`. You'll need it later.
 
 ## Testing serial communication
 
diff --git a/recipes/trs80/xcomp.fs b/recipes/trs80/xcomp.fs
index 4abc0ab..8bc4acd 100644
--- a/recipes/trs80/xcomp.fs
+++ b/recipes/trs80/xcomp.fs
@@ -7,14 +7,13 @@ RS_ADDR 0x80 - CONSTANT RAMSTART
 
 0x3000 BIN( !
 282 LOAD  ( boot.z80 )
-492 LOAD  ( trs80.z80 )
 393 LOAD  ( xcomp core low )
+492 LOAD  ( trs80 )
 420 LOAD  ( xcomp core high )
 (entry) _
 ( Update LATEST )
 PC ORG @ 8 + !
 ," CURRENT @ HERE ! "
-499 500 XPACKR ( trs80.fs )
 ( 0x0a == NLPTR. TRS-80 wants CR-only newlines )
 ," : _ ['] CR 0x0a RAM+ ! BLK$ FD$ (ok) RDLN$ ; _ "
 ORG @ 256 /MOD 2 PC! 2 PC!