Add layer of indirection to EMIT
This would allow things like temporary giving control to the *CL line on the TRS-80. For example... A very far fetched example. Not at all the only *raison d'etre* of the layer...
This commit is contained in:
Virgil Dupras
parent
5bf3baff05
commit
ecca70c7f3
18
blk/081
18
blk/081
@ -1,16 +1,16 @@
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(cont.)
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RAMSTART INITIAL_SP +53 readln's variables
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+02 CURRENT +55 adev's variables
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+04 HERE +57 blk's variables
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+06 C<?* +59 z80a's variables
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+08 C<* override +5b FUTURE USES
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+0a PARSEPTR +70 DRIVERS
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+0c C<* +80 RAMEND
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+0e WORDBUF
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RAMSTART INITIAL_SP +55 EMITPTR override
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+02 CURRENT +57 readln's variables
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+04 HERE +59 blk's variables
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+06 C<? +5b z80a's variables
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+08 C<* override +5d adev's variables
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+0a PARSEPTR +5f FUTURE USES
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+0c C<* +70 DRIVERS
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+0e WORDBUF +80 RAMEND
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+2e BOOT C< PTR
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+4e INTJUMP
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+51 CURRENTPTR
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+53 EMITPTR
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(cont.)
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4
blk/143
4
blk/143
@ -1,9 +1,9 @@
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: ADEVMEM+ 0x55 RAM+ @ + ;
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: ADEVMEM+ 0x5d RAM+ @ + ;
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: A@* 0 ADEVMEM+ ;
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: A!* 2 ADEVMEM+ ;
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: ADEV$
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H@ 0x55 RAM+ !
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H@ 0x5d RAM+ !
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4 ALLOT
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['] C@ A@* !
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['] C! A!* !
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4
blk/213
4
blk/213
@ -1,9 +1,9 @@
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: Z80AMEM+ 0x59 RAM+ @ + ;
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: Z80AMEM+ 0x5b RAM+ @ + ;
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: ORG 0 Z80AMEM+ ;
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: BIN( 2 Z80AMEM+ ;
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: L1 4 Z80AMEM+ ; : L2 6 Z80AMEM+ ;
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: L3 8 Z80AMEM+ ; : L4 10 Z80AMEM+ ;
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: Z80A$ H@ 0x59 RAM+ ! 12 ALLOT 0 BIN( ! ;
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: Z80A$ H@ 0x5b RAM+ ! 12 ALLOT 0 BIN( ! ;
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: A 7 ; : B 0 ; : C 1 ; : D 2 ;
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: E 3 ; : H 4 ; : L 5 ; : (HL) 6 ;
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: BC 0 ; : DE 1 ; : HL 2 ; : AF 3 ; : SP AF ;
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17
blk/355
Normal file
17
blk/355
Normal file
@ -0,0 +1,17 @@
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IFZ, ( end of buffer reached? )
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( yes )
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( +4 == ACIA( )
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ACIA_MEM 4 + LDHL(nn),
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( +2 == ACIAW> )
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ACIA_MEM 2+ LD(nn)HL,
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THEN,
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THEN,
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THEN,
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DE POPqq,
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HL POPqq,
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AF POPqq,
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EI,
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RETI,
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16
blk/356
16
blk/356
@ -1,16 +0,0 @@
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IFZ, ( end of buffer reached? )
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( yes )
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( +4 == ACIA( )
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ACIA_MEM 4 + LDHL(nn),
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( +2 == ACIAW> )
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ACIA_MEM 2+ LD(nn)HL,
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THEN,
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THEN,
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THEN,
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DE POPqq,
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HL POPqq,
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AF POPqq,
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EI,
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RETI,
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30
blk/359
30
blk/359
@ -1,16 +1,16 @@
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: ACIA$
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H@ DUP DUP ACIA( ! ACIAR> !
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1+ ACIAW> ! ( write index starts one position later )
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ACIABUFSZ ALLOT
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H@ ACIA) !
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( setup ACIA
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CR7 (1) - Receive Interrupt enabled
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CR6:5 (00) - RTS low, transmit interrupt disabled.
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CR4:2 (101) - 8 bits + 1 stop bit
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CR1:0 (10) - Counter divide: 64 )
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0b10010110 ACIA_CTL PC!
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( setup interrupt )
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0xc3 0x4e RAM+ C! ( c3==JP, 4e==INTJUMP )
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['] ~ACIA 0x4f RAM+ !
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(im1)
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: KEY
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( inc then fetch )
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ACIAR> @ 1+ DUP ACIA) @ = IF
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DROP ACIA( @
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THEN
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( As long as R> == W>-1, it means that buffer is empty )
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BEGIN DUP ACIAW> @ = NOT UNTIL
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ACIAR> !
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ACIAR> @ C@
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;
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: (emit)
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( As long at CTL bit 1 is low, we are transmitting. wait )
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BEGIN ACIA_CTL PC@ 0x02 AND UNTIL
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( The way is clear, go! )
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ACIA_IO PC!
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;
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33
blk/360
33
blk/360
@ -1,16 +1,17 @@
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: KEY
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( inc then fetch )
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ACIAR> @ 1+ DUP ACIA) @ = IF
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DROP ACIA( @
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THEN
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( As long as R> == W>-1, it means that buffer is empty )
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BEGIN DUP ACIAW> @ = NOT UNTIL
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ACIAR> !
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ACIAR> @ C@
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;
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: EMIT
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( As long at CTL bit 1 is low, we are transmitting. wait )
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BEGIN ACIA_CTL PC@ 0x02 AND UNTIL
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( The way is clear, go! )
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ACIA_IO PC!
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;
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: ACIA$
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H@ DUP DUP ACIA( ! ACIAR> !
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1+ ACIAW> ! ( write index starts one position later )
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ACIABUFSZ ALLOT
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H@ ACIA) !
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( setup ACIA
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CR7 (1) - Receive Interrupt enabled
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CR6:5 (00) - RTS low, transmit interrupt disabled.
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CR4:2 (101) - 8 bits + 1 stop bit
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CR1:0 (10) - Counter divide: 64 )
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0b10010110 ACIA_CTL PC!
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( setup interrupt )
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0xc3 0x4e RAM+ C! ( c3==JP, 4e==INTJUMP )
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['] ~ACIA 0x4f RAM+ !
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['] (emit) 0x53 RAM+ ! ( 53==EMITPTR )
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(im1) ;
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8
blk/405
8
blk/405
@ -1,15 +1,15 @@
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: BOOT
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0x02 RAM+ CURRENT* !
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LIT< (parse) (find) DROP (parse*) !
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( 2e == SYSTEM SCRATCHPAD )
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CURRENT @ 0x2e RAM+ !
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CURRENT @ 0x2e RAM+ ! ( 2e == BOOT C< PTR)
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0 0x08 RAM+ ! ( 08 == C<* override )
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LIT< (emit) (find) DROP 0x53 RAM+ ! ( 53 == EMITPTR )
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0 0x55 RAM+ ! ( 55 == EMITPTR override )
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( 0c == C<* )
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LIT< (boot<) (find) DROP 0x0c RAM+ !
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( boot< always has a char waiting. 06 == C<?* )
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1 0x06 RAM+ !
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LIT< INIT (find)
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IF EXECUTE
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ELSE DROP INTERPRET THEN
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IF EXECUTE ELSE DROP INTERPRET THEN
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;
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4
blk/442
4
blk/442
@ -1,4 +1,6 @@
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( EMIT is needed for this unit to compile )
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: EMIT
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( 0x53==EMITPTR 0x55==override )
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85 RAM+ @ DUP NOT IF DROP 83 RAM+ @ THEN EXECUTE ;
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: (print)
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BEGIN
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2
blk/453
2
blk/453
@ -1,5 +1,5 @@
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64 CONSTANT INBUFSZ
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: RDLNMEM+ 0x53 RAM+ @ + ;
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: RDLNMEM+ 0x57 RAM+ @ + ;
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( current position in INBUF )
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: IN> 0 RDLNMEM+ ;
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( points to INBUF )
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4
blk/457
4
blk/457
@ -1,7 +1,7 @@
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( Initializes the readln subsystem )
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: RDLN$
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( 53 == rdln's memory )
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H@ 0x53 RAM+ !
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( 57 == rdln's memory )
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H@ 0x57 RAM+ !
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( 2 for IN>, plus 2 for extra bytes after buffer: 1 for
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the last typed 0x0a and one for the following NULL. )
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INBUFSZ 4 + ALLOT
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2
blk/464
2
blk/464
@ -1,4 +1,4 @@
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: BLKMEM+ 0x57 RAM+ @ + ;
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: BLKMEM+ 0x59 RAM+ @ + ;
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( n -- Fetches block n and write it to BLK( )
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: BLK@* 0 BLKMEM+ ;
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( n -- Write back BLK( to storage at block n )
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2
blk/465
2
blk/465
@ -1,5 +1,5 @@
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: BLK$
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H@ 0x57 RAM+ !
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H@ 0x59 RAM+ !
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( 1024 for the block, 8 for variables )
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1032 ALLOT
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( LOAD detects end of block with ASCII EOT. This is why
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2
blk/493
2
blk/493
@ -4,7 +4,7 @@ CODE KEY
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L A LDrr, H 0 LDrn,
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HL PUSHqq,
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;CODE
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CODE EMIT
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CODE (emit)
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BC POPqq, ( c == @DSP arg )
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chkPS,
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A 0x02 LDrn, ( @DSP )
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BIN
emul/forth.bin
BIN
emul/forth.bin
Binary file not shown.
@ -16,7 +16,7 @@ H@ 256 /MOD 2 PC! 2 PC!
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( Update LATEST )
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PC ORG @ 8 + !
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," CURRENT @ HERE ! "
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," : EMIT 0 PC! ; "
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," : (emit) 0 PC! ; CURRENT @ 83 RAM+ ! "
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," : KEY 0 PC@ ; "
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422 470 XPACKR
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," ' KEY 12 RAM+ ! "
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