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@@ -159,3 +159,68 @@ For jumps, it's special. 's' is SHORT, 'n' is NEAR, 'f' is FAR. |
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# 8086 Instructions list |
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TODO |
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# AVR assembler |
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Load with "50 LOAD". As with the Z80 assembler, it is incom- |
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plete. |
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All mnemonics in AVR have a single signature. Therefore, we |
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don't need any "argtype" suffixes. |
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Registers are referred to with consts R0-R31. There is |
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X, Y, Z, X+, Y+, Z+, X-, Y-, Z- for appropriate ops (LD, ST). |
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XL, XH, YL, YH, ZL, ZH are simple aliases to R26-R31. |
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Branching works differently. Instead of expecting a byte to be |
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written after the naked op, branching words expect a displace- |
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ment argument. |
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This is because there's bitwise ORing involved in the creation |
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of the final opcode, which makes z80a's approach impractical. |
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This makes labelling a bit different too. Instead of expecting |
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label words after the naked branching op, we rather have label |
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words expecting branching wordref as an argument. Examples: |
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L2 ' BRTS FLBL! ( branch forward to L2 ) |
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L1 ' RJMP LBL, ( branch backward to L1 ) |
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# AVR instructions list |
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OPRd (B53) |
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ASR COM DEC INC LAC LAS LAT LSR NEG POP PUSH |
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ROR SWAP XCH |
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OPRdRr (B54) |
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ADC ADD AND CP CPC CPSE EOR MOV MUL OR SBC |
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SUB |
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OPRdA (B54) |
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IN OUT |
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OPRdK (B55) |
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ANDI CPI LDI ORI SBCI SBR SUBI |
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OPAb (B55) |
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CBI SBI SBIC SBIS |
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OPNA (B56) |
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BREAK CL[C,H,I,N,S,T,V,Z] SE[C,H,I,N,S,T,V,Z] EIJMP ICALL |
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EICALL IJMP NOP RET RETI SLEEP WDR |
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OPb (B57) |
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BCLR BSET |
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OPRdb (B57) |
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BLD BST SBRC SBRS |
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Special (B57,B60) |
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CLR TST LSL LD ST |
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Flow (B58) |
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RJMP RCALL |
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BR[BC,BS,CC,CS,EQ,NE,GE,HC,HS,ID,IE,LO,LT,MI,PL,SH,TC,TS,VC,VS] |
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Flow macros (B61) |
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LBL! LBL, SKIP, TO, FLBL, FLBL! BEGIN, AGAIN? AGAIN, IF, THEN, |