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Author SHA1 Message Date
Virgil Dupras
212126d6d2 avra: add RJMP and RCALL 2020-05-17 10:13:43 -04:00
Virgil Dupras
b5d42924ba avra: add arg range checks 2020-05-17 09:30:36 -04:00
Virgil Dupras
5227777b34 avra: add OPb and OPRdb instr classes 2020-05-17 08:57:23 -04:00
Virgil Dupras
2e23b84fc1 avra: simplify OPRdRr 2020-05-16 22:16:41 -04:00
Virgil Dupras
75a1b2d504 avra: add OPAb instr class 2020-05-16 21:59:07 -04:00
Virgil Dupras
322be4d576 avra: add OPNA instr class 2020-05-16 21:44:47 -04:00
Virgil Dupras
0f2d14ad8a z80a: add BREAK, instruction 
This allows us to remove a lot of labels usage in boot code. This
commit has no effect on forth.bin.
 2020-05-16 21:02:50 -04:00
Virgil Dupras
fd597d29d2 boot: remove spurious label usage 2020-05-16 19:47:34 -04:00
Virgil Dupras
ee3407bf1c avra: first steps 2020-05-16 09:51:02 -04:00
Virgil Dupras
ed3bee787d emul: add a zasm.sh wrapper around stage executable 2020-05-16 07:47:47 -04:00
Virgil Dupras
863540f7c6 core: define H@ a bit sooner 2020-05-15 22:59:38 -04:00
Virgil Dupras
bd38d80f9c Move Cross-compiled core from B390 to B350 
and renamed it "Core words". Also, reworded the presentation.
 2020-05-15 22:44:49 -04:00
Virgil Dupras
f2817870aa sms: working on real hardware! 2020-05-15 21:53:26 -04:00
Virgil Dupras
7ceff6144c sms: implement pad button B ( next class ) 2020-05-15 21:18:32 -04:00
Virgil Dupras
b6c039589f Don't emit BS when at beginning of input buffer 2020-05-15 20:51:09 -04:00
Virgil Dupras
aad713c477 sms: implement backspace with pad button A 2020-05-15 20:32:04 -04:00
Virgil Dupras
fdea069544 sms: implement button C and Start in Pad 2020-05-15 17:46:18 -04:00
Virgil Dupras
ebc70be8e8 ti84: use dd instead of truncate 
More portable
 2020-05-15 17:25:58 -04:00
Virgil Dupras
852c775b5b sms: implement linefeed in VDP 2020-05-15 16:08:27 -04:00
Virgil Dupras
f9a8e6f180 sms: Pad WIP 2020-05-15 15:41:06 -04:00
Virgil Dupras
1597f1e131 Don't generalize XYPOS just yet 
It was ill-advised.
 2020-05-15 14:09:31 -04:00
Virgil Dupras
db9885b8cf Rename (find) to FIND 
I hadn't noticed that this word was almost ANS compliant.
 2020-05-15 12:50:14 -04:00
Virgil Dupras
175b4bc497 sms: CollapseOS prompt! 2020-05-15 12:46:25 -04:00
Virgil Dupras
ca60685067 Streamline initialization process 
Instead of letting each configuration taking care of RDLN$ and
"CollapseOS" prompt, move this to BOOT to simplify xcomp units.

Initialization source code is now only for driver initialization.
 2020-05-15 11:34:35 -04:00
Virgil Dupras
0163af470a Fix EOT behavior after QUIT 
Previously, calling quit would break EOT behavior and not properly
quit Collapse OS.
 2020-05-15 10:19:39 -04:00
Virgil Dupras
43eabf566b sms: WIP ! 2020-05-14 22:15:31 -04:00
Virgil Dupras
faa2576f83 CI: don't needlessly run tests twice 
Verifying that forth.bin is stable is enough. Also, fix shebang.
 2020-05-14 18:58:06 -04:00
Virgil Dupras
87b51a6261 By default, allocate about 0x100 bytes for PSP+RSP 
During "make updatebootstrap", we use less than 0x20 bytes on the
PSP side and less than 0x40 bytes on the RSP one. 0x100 bytes ought
to be enough for anybody.
 2020-05-14 18:41:09 -04:00
Virgil Dupras
bf289b0a67 z80a: de-variable-ize 
Use straight VARIABLE instead of Z80MEM+. Initially, I used this
system to allow z80a to be embedded in a system binary, but now
I don't think it's worth it. Compiled, z80a is 2.5k. Sure, it's a
sizeable amount of RAM, but I think that even with it in RAM, I'll
manage a bootstrap within my most constrained machine, the SMS with
8K.
 2020-05-14 15:29:22 -04:00
Virgil Dupras
3fbae082f4 Remove INTJUMP mechanism 
Not worth the trouble. Easier to set jump in binary directly.
 2020-05-14 15:13:16 -04:00
Virgil Dupras
a5269a1c7c Make blk use system RAM 2020-05-14 14:51:20 -04:00
Virgil Dupras
eec9549bde Make rdln use system RAM 2020-05-14 14:26:56 -04:00
Virgil Dupras
b606dbf9af rc2014: move xcomp unit's contents to blkfs 2020-05-14 12:29:34 -04:00
Virgil Dupras
a8e8204eba trs80: adapt recipe to single stage xcomp 2020-05-14 12:08:17 -04:00
Virgil Dupras
8a58449776 Add word ERR 2020-05-14 11:57:26 -04:00
Virgil Dupras
303b34b483 ti84: adapt recipe to single stage xcomp 2020-05-14 11:36:10 -04:00
Virgil Dupras
0703da928e rc2014: adapt recipe to single stage xcomp 
It's now much easier...
 2020-05-14 11:32:51 -04:00
Virgil Dupras
b0258f5bba Fix tests 2020-05-14 10:58:41 -04:00
Virgil Dupras
5446afd87d emul: rename stage2 to stage 2020-05-14 10:55:39 -04:00
Virgil Dupras
9d4d9de511 emul: remove stage1 2020-05-14 10:49:24 -04:00
Virgil Dupras
e6bac985fa Cross-compiles in a single stage! 
Finally got rid of the XPACKed core and managed to cross-compile
all core words, which greatly simplifies the bootstrapping process.
 2020-05-14 10:17:38 -04:00
Virgil Dupras
68262f925b Almost done De-XPACKing! 2020-05-14 09:58:48 -04:00
Virgil Dupras
640e3321fc Move a bunch of words from XPACKed core to xcomp core 2020-05-14 09:54:33 -04:00
Virgil Dupras
4143e2a699 Improve late-stage xcomp 2020-05-14 09:45:42 -04:00
Virgil Dupras
179c66be8a Move a bunch of words from XPACKed core to xcomp core 2020-05-14 08:50:43 -04:00
Virgil Dupras
74896051bb Move BOOT, (boot<) and INTEPRET to high xcomp 
Saves us an (ok) indirection and will save us more soon.
 2020-05-14 08:45:01 -04:00
Virgil Dupras
b17bd4dca0 wip 2020-05-14 08:33:06 -04:00
Virgil Dupras
40a756cf1c Move a bunch of words from XPACKed core to xcomp core 2020-05-14 08:18:53 -04:00
Virgil Dupras
51997533ff Move a bunch of words from XPACKed core to xcomp core 2020-05-14 07:58:55 -04:00
Virgil Dupras
80d730318a Simplify LOAD's INTERPRET exit mechanism 2020-05-13 22:55:52 -04:00