# DEC — Decrement by 1 ## Description Subtracts 1 from the destination operand, while preserving the state of the CF flag. The destination operand can be a register or a memory location. This instruction allows a loop counter to be updated without disturbing the CF flag. To perform a decrement operation that updates the CF flag, use a SUB instruction with an immediate operand of 1. ## Instruction | Opcode | Assembly | Op/En | Modern Mode | Legacy Mode | Description | |---------------|-----------|-------|-------------|-------------|------------------------------------------------------------------------------| | FE /1 | DEC r/m8 | M | Valid | Valid | Decrement r/m byte by 1. | | REX + FE /1 | DEC r/m8* | M | Valid | N.E. | Decrement r/m byte by 1. | | FF /1 | DEC r/m16 | M | Valid | Valid | Decrement r/m word by 1. | | FF /1 | DEC r/m32 | M | Valid | Valid | Decrement r/m doubleword by 1. | | REX.W + FF /1 | DEC r/m64 | M | Valid | N.E. | Decrement r/m quadword by 1. | | 48+ rw** | DEC r16 | O | N.E. | Valid | Decrement word register by 1. | | 48+ rd | DEC r32 | O | N.E. | Valid | Decrement doubleword register by 1. | - In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH. - 40H through 47H are REX prefixes in 64-bit mode. ## Information This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically. n 64-bit mode, DEC r16 and DEC r32 are not encodable (because opcodes 48H through 4FH are REX prefixes). Otherwise, the instruction’s 64-bit mode default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits.