# DIV - Unsigned Divide ## Description Divides unsigned the value in the AX, DX:AX, EDX:EAX, or RDX:RAX registers (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, EDX:EAX, or RDX:RAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor). Division using 64-bit operand is available only in 64-bit mode. ## Instruction | Opcode | Assembly | Op/En | Modern Mode | Legacy Mode | Description | |---------------|-----------|-------|-------------|-------------|------------------------------------------------------------------------------| | F6 /6 | DIV r/m8 | M | Valid | Valid | Unsigned divide AX by r/m8, result in AL=Quotient, AH=Remainder. | | REX + F6 /6 | DIV r/m8* | M | Valid | N.E. | Unsigned divide AX by r/m8, result in AL=Quotient, AH=Remainder. | | F7 /6 | DIV r/m16 | M | Valid | Valid | Unsigned divide DX:AX by r/m16, result in AX=Quotient, DX=Remainder. | | F7 /6 | DIV r/m32 | M | Valid | Valid | Unsigned divide EDX:EAX by r/m32, result in EAX=Quotient, EDX=Remainder. | | REX.W + F7 /6 | DIV r/m64 | M | Valid | N.E. | Unsigned divide RDX:RAX by r/m64, result in RAX=Quotient, RDX=Remainder. | - In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH. ## Information Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag. In 64-bit mode, the instruction’s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the unsigned value in RDX:RAX by the source operand and stores the quotient in RAX, the remainder in RDX.