2019-05-07 14:50:24 -04:00
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; sdc
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;
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; Manages the initialization of a SD card and implement a block device to read
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; and write from/to it, in SPI mode.
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;
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; Note that SPI can't really be used directly from the z80, so this part
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|
; assumes that you have a device that handles SPI communication on behalf of
|
2019-05-28 11:01:17 -04:00
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; the z80. This device is assumed to work in a particular way. See the
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; "rc2014/sdcard" recipe for details.
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2019-05-07 14:50:24 -04:00
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;
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; That device has 3 ports. One write-only port to make CS high, one to make CS
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; low (data sent is irrelevant), and one read/write port to send and receive
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; bytes with the card through the SPI protocol. The device acts as a SPI master
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; and writing to that port initiates a byte exchange. Data from the slave is
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; then placed on a buffer that can be read by reading the same port.
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;
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; It's through that kind of device that this code below is supposed to work.
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2019-06-06 15:57:32 -04:00
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;
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; *** SDC buffers ***
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;
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; SD card's lowest common denominator in terms of block size is 512 bytes, so
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; that's what we deal with. To avoid wastefully reading entire blocks from the
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2019-10-30 16:59:35 -04:00
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; card for one byte read ops, we buffer the last read block. If a GetB or PutB
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2019-06-06 15:57:32 -04:00
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; operation is within that buffer, then no interaction with the SD card is
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; necessary.
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;
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2019-10-30 16:59:35 -04:00
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; As soon as a GetB or PutB operation is made that is outside the current
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2019-06-06 15:57:32 -04:00
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|
; buffer, we load a new block.
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;
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2019-10-30 16:59:35 -04:00
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; When we PutB, we flag the buffer as "dirty". On the next buffer change (during
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2019-06-06 15:57:32 -04:00
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|
; an out-of-buffer request or during an explicit "flush" operation), bytes
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; currently in the buffer will be written to the SD card.
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;
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; We hold 2 buffers in memory, each targeting a different sector and with its
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; own dirty flag. We do that to avoid wasteful block writing in the case where
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|
; we read data from a file in the SD card, process it and write the result
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|
|
; right away, in another file on the same card (zasm), on a different sector.
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;
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; If we only have one buffer in this scenario, we'll end up loading a new sector
|
2019-10-30 16:59:35 -04:00
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|
; at each GetB/PutB operation and, more importantly, writing a whole block for
|
2019-06-06 15:57:32 -04:00
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; a few bytes each time. This will wear the card prematurely (and be very slow).
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;
|
2019-10-30 16:59:35 -04:00
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; With 2 buffers, we solve the problem. Whenever GetB/PutB is called, we first
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2019-06-06 15:57:32 -04:00
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; look if one of the buffer holds our sector. If not, we see if one of the
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; buffer is clean (not dirty). If yes, we use this one. If both are dirty or
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; clean, we use any. This way, as long as writing isn't made to random
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; addresses, we ensure that we don't write wastefully because read operations,
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; even if random, will always use the one buffer that isn't dirty.
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2019-05-07 14:50:24 -04:00
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|
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|
|
; *** Defines ***
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; SDC_PORT_CSHIGH: Port number to make CS high
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|
; SDC_PORT_CSLOW: Port number to make CS low
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|
|
; SDC_PORT_SPI: Port number to send/receive SPI data
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|
2019-05-08 20:08:17 -04:00
|
|
|
; *** Consts ***
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.equ SDC_BLKSIZE 512
|
2019-06-18 22:03:48 -04:00
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|
.equ SDC_MAXTRIES 8
|
2019-05-08 20:08:17 -04:00
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|
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|
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|
; *** Variables ***
|
2019-06-06 15:57:32 -04:00
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; This is a pointer to the currently selected buffer. This points to the BUFSEC
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|
; part, that is, two bytes before actual content begins.
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|
|
.equ SDC_BUFPTR SDC_RAMSTART
|
2019-06-18 22:03:48 -04:00
|
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|
; Count the number of times we tried a particular read or write operation. When
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|
|
; CRC check fail, we retry. After SDC_MAXTRIES failures, we stop.
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|
|
.equ SDC_RETRYCNT SDC_BUFPTR+2
|
2019-06-15 13:41:20 -04:00
|
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|
; Sector number currently in SDC_BUF1. Little endian like any other z80 word.
|
2019-06-18 22:03:48 -04:00
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|
|
.equ SDC_BUFSEC1 SDC_RETRYCNT+1
|
2019-05-30 14:55:38 -04:00
|
|
|
; Whether the buffer has been written to. 0 means clean. 1 means dirty.
|
2019-06-15 13:41:20 -04:00
|
|
|
.equ SDC_BUFDIRTY1 SDC_BUFSEC1+2
|
2019-06-06 15:57:32 -04:00
|
|
|
; The contents of the buffer.
|
2019-06-06 22:16:28 -04:00
|
|
|
.equ SDC_BUF1 SDC_BUFDIRTY1+1
|
2019-06-18 15:21:58 -04:00
|
|
|
; CRC bytes for the buffer. They're placed after the contents because that makes
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|
|
; things easier processing-wise. Because the SD card sends them right after the
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|
|
; contents, all we need to do is read SDC_BLKSIZE+2.
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|
|
; IMPORTANT NOTE: This is big endian. The SD card sends the MSB first, so we
|
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|
; keep it in memory this way.
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|
|
.equ SDC_CRC1 SDC_BUF1+SDC_BLKSIZE
|
2019-06-06 22:16:28 -04:00
|
|
|
|
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|
|
; second buffer has the same structure as the first.
|
2019-06-18 15:21:58 -04:00
|
|
|
.equ SDC_BUFSEC2 SDC_CRC1+2
|
2019-06-15 13:41:20 -04:00
|
|
|
.equ SDC_BUFDIRTY2 SDC_BUFSEC2+2
|
2019-06-06 22:16:28 -04:00
|
|
|
.equ SDC_BUF2 SDC_BUFDIRTY2+1
|
2019-06-18 15:21:58 -04:00
|
|
|
.equ SDC_CRC2 SDC_BUF2+SDC_BLKSIZE
|
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|
|
.equ SDC_RAMEND SDC_CRC2+2
|
2019-05-08 20:08:17 -04:00
|
|
|
|
|
|
|
; *** Code ***
|
2019-05-07 14:50:24 -04:00
|
|
|
; Wake the SD card up. After power up, a SD card has to receive at least 74
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|
|
|
; dummy clocks with CS and DI high. We send 80.
|
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|
|
sdcWakeUp:
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|
|
out (SDC_PORT_CSHIGH), a
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|
|
ld b, 10 ; 10 * 8 == 80
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|
|
ld a, 0xff
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|
|
.loop:
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|
|
out (SDC_PORT_SPI), a
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|
|
|
nop
|
|
|
|
djnz .loop
|
|
|
|
ret
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|
|
|
|
|
|
|
; Initiate SPI exchange with the SD card. A is the data to send. Received data
|
|
|
|
; is placed in A.
|
|
|
|
sdcSendRecv:
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|
|
|
out (SDC_PORT_SPI), a
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
in a, (SDC_PORT_SPI)
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
ret
|
|
|
|
|
2019-05-31 21:33:42 -04:00
|
|
|
sdcIdle:
|
|
|
|
ld a, 0xff
|
|
|
|
jp sdcSendRecv
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|
|
|
|
2019-05-07 14:50:24 -04:00
|
|
|
; sdcSendRecv 0xff until the response is something else than 0xff for a maximum
|
|
|
|
; of 20 times. Returns 0xff if no response.
|
|
|
|
sdcWaitResp:
|
|
|
|
push bc
|
|
|
|
ld b, 20
|
|
|
|
.loop:
|
2019-05-31 21:33:42 -04:00
|
|
|
call sdcIdle
|
2019-05-07 14:50:24 -04:00
|
|
|
inc a ; if 0xff, it's going to become zero
|
|
|
|
jr nz, .end ; not zero? good, that's our command
|
|
|
|
djnz .loop
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|
|
|
.end:
|
|
|
|
; whether we had a success or failure, we return the result.
|
|
|
|
; But first, let's bring it back to its original value.
|
|
|
|
dec a
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|
|
|
pop bc
|
|
|
|
ret
|
|
|
|
|
2019-06-07 14:59:53 -04:00
|
|
|
; The opposite of sdcWaitResp: we wait until response if 0xff. After a
|
|
|
|
; successful read or write operation, the card will be busy for a while. We need
|
|
|
|
; to give it time before interacting with it again. Technically, we could
|
|
|
|
; continue processing on our side while the card it busy, and maybe we will one
|
|
|
|
; day, but at the moment, I'm having random write errors if I don't do this
|
|
|
|
; right after a write, so I prefer to stay cautious for now.
|
|
|
|
; This has no error condition and preserves A
|
|
|
|
sdcWaitReady:
|
|
|
|
push af
|
2019-06-10 15:13:46 -04:00
|
|
|
; for now, we have no timeout for waiting. It means that broken SD
|
|
|
|
; cards can cause infinite loops.
|
2019-06-07 14:59:53 -04:00
|
|
|
.loop:
|
|
|
|
call sdcIdle
|
|
|
|
inc a ; if 0xff, it's going to become zero
|
2019-06-10 15:13:46 -04:00
|
|
|
jr nz, .loop ; not zero? still busy. loop
|
2019-06-07 14:59:53 -04:00
|
|
|
pop af
|
|
|
|
ret
|
|
|
|
|
2019-05-07 14:50:24 -04:00
|
|
|
; Sends a command to the SD card, along with arguments and specified CRC fields.
|
|
|
|
; (CRC is only needed in initial commands though).
|
|
|
|
; A: Command to send
|
|
|
|
; H: Arg 1 (MSB)
|
|
|
|
; L: Arg 2
|
|
|
|
; D: Arg 3
|
|
|
|
; E: Arg 4 (LSB)
|
|
|
|
;
|
|
|
|
; Returns R1 response in A.
|
|
|
|
;
|
|
|
|
; This does *not* handle CS. You have to select/deselect the card outside this
|
|
|
|
; routine.
|
|
|
|
sdcCmd:
|
2019-06-18 14:45:55 -04:00
|
|
|
push bc
|
|
|
|
|
2019-05-07 14:50:24 -04:00
|
|
|
; Wait until ready to receive commands
|
|
|
|
push af
|
|
|
|
call sdcWaitResp
|
|
|
|
pop af
|
|
|
|
|
2019-06-18 14:45:55 -04:00
|
|
|
ld c, 0 ; init CRC
|
|
|
|
call .crc7
|
2019-05-07 14:50:24 -04:00
|
|
|
call sdcSendRecv
|
|
|
|
; Arguments
|
|
|
|
ld a, h
|
2019-06-18 14:45:55 -04:00
|
|
|
call .crc7
|
2019-05-07 14:50:24 -04:00
|
|
|
call sdcSendRecv
|
|
|
|
ld a, l
|
2019-06-18 14:45:55 -04:00
|
|
|
call .crc7
|
2019-05-07 14:50:24 -04:00
|
|
|
call sdcSendRecv
|
|
|
|
ld a, d
|
2019-06-18 14:45:55 -04:00
|
|
|
call .crc7
|
2019-05-07 14:50:24 -04:00
|
|
|
call sdcSendRecv
|
|
|
|
ld a, e
|
2019-06-18 14:45:55 -04:00
|
|
|
call .crc7
|
2019-05-07 14:50:24 -04:00
|
|
|
call sdcSendRecv
|
|
|
|
; send CRC
|
|
|
|
ld a, c
|
2019-06-18 14:45:55 -04:00
|
|
|
or 0x01 ; ensure stop bit is set
|
2019-05-07 14:50:24 -04:00
|
|
|
call sdcSendRecv
|
|
|
|
|
|
|
|
; And now we just have to wait for a valid response...
|
2019-06-18 14:45:55 -04:00
|
|
|
call sdcWaitResp
|
|
|
|
pop bc
|
|
|
|
ret
|
|
|
|
|
|
|
|
; push A into C and compute CRC7 with 0x09 polynomial
|
|
|
|
; Note that the result is "left aligned", that is, that 8th bit to the "right"
|
|
|
|
; is insignificant (will be stop bit).
|
|
|
|
.crc7:
|
|
|
|
push af
|
|
|
|
xor c
|
|
|
|
ld b, 8
|
|
|
|
.loop:
|
|
|
|
sla a
|
|
|
|
jr nc, .noCRC
|
|
|
|
; msb was set, apply polynomial
|
|
|
|
xor 0x12 ; 0x09 << 1. We apply CRC on high 7 bits
|
|
|
|
.noCRC:
|
|
|
|
djnz .loop
|
|
|
|
ld c, a
|
|
|
|
pop af
|
|
|
|
ret
|
2019-05-07 14:50:24 -04:00
|
|
|
|
|
|
|
; Send a command that expects a R1 response, handling CS.
|
|
|
|
sdcCmdR1:
|
|
|
|
out (SDC_PORT_CSLOW), a
|
|
|
|
call sdcCmd
|
|
|
|
out (SDC_PORT_CSHIGH), a
|
|
|
|
ret
|
|
|
|
|
|
|
|
; Send a command that expects a R7 response, handling CS. A R7 is a R1 followed
|
|
|
|
; by 4 bytes. Those 4 bytes are returned in HL/DE in the same order as in
|
|
|
|
; sdcCmd.
|
|
|
|
sdcCmdR7:
|
|
|
|
out (SDC_PORT_CSLOW), a
|
|
|
|
call sdcCmd
|
|
|
|
|
|
|
|
; We have our R1 response in A. Let's try reading the next 4 bytes in
|
|
|
|
; case we have a R3.
|
|
|
|
push af
|
2019-06-18 14:45:55 -04:00
|
|
|
call sdcIdle
|
2019-05-07 14:50:24 -04:00
|
|
|
ld h, a
|
2019-06-18 14:45:55 -04:00
|
|
|
call sdcIdle
|
2019-05-07 14:50:24 -04:00
|
|
|
ld l, a
|
2019-06-18 14:45:55 -04:00
|
|
|
call sdcIdle
|
2019-05-07 14:50:24 -04:00
|
|
|
ld d, a
|
2019-06-18 14:45:55 -04:00
|
|
|
call sdcIdle
|
2019-05-07 14:50:24 -04:00
|
|
|
ld e, a
|
|
|
|
pop af
|
|
|
|
|
|
|
|
out (SDC_PORT_CSHIGH), a
|
|
|
|
ret
|
2019-05-08 16:03:54 -04:00
|
|
|
|
|
|
|
; Initialize a SD card. This should be called at least 1ms after the powering
|
|
|
|
; up of the card. Sets result code in A. Zero means success, non-zero means
|
|
|
|
; error.
|
|
|
|
sdcInitialize:
|
|
|
|
push hl
|
|
|
|
push de
|
|
|
|
push bc
|
|
|
|
call sdcWakeUp
|
|
|
|
|
|
|
|
; Call CMD0 and expect a 0x01 response (card idle)
|
|
|
|
; This should be called multiple times. We're actually expected to.
|
|
|
|
; Let's call this for a maximum of 10 times.
|
|
|
|
ld b, 10
|
|
|
|
.loop1:
|
|
|
|
ld a, 0b01000000 ; CMD0
|
|
|
|
ld hl, 0
|
|
|
|
ld de, 0
|
|
|
|
call sdcCmdR1
|
|
|
|
cp 0x01
|
|
|
|
jp z, .cmd0ok
|
|
|
|
djnz .loop1
|
|
|
|
; Nothing? error
|
|
|
|
jr .error
|
|
|
|
.cmd0ok:
|
|
|
|
|
|
|
|
; Then comes the CMD8. We send it with a 0x01aa argument and expect
|
|
|
|
; a 0x01aa argument back, along with a 0x01 R1 response.
|
|
|
|
ld a, 0b01001000 ; CMD8
|
|
|
|
ld hl, 0
|
|
|
|
ld de, 0x01aa
|
|
|
|
call sdcCmdR7
|
|
|
|
cp 0x01
|
|
|
|
jr nz, .error
|
|
|
|
xor a
|
|
|
|
cp h ; H is zero
|
|
|
|
jr nz, .error
|
|
|
|
cp l ; L is zero
|
|
|
|
jr nz, .error
|
|
|
|
ld a, d
|
|
|
|
cp 0x01
|
|
|
|
jp nz, .error
|
|
|
|
ld a, e
|
|
|
|
cp 0xaa
|
|
|
|
jr nz, .error
|
|
|
|
|
|
|
|
; Now we need to repeatedly run CMD55+CMD41 (0x40000000) until we
|
|
|
|
; the card goes out of idle mode, that is, when it stops sending us
|
|
|
|
; 0x01 response and send us 0x00 instead. Any other response means that
|
|
|
|
; initialization failed.
|
|
|
|
.loop2:
|
|
|
|
ld a, 0b01110111 ; CMD55
|
|
|
|
ld hl, 0
|
|
|
|
ld de, 0
|
|
|
|
call sdcCmdR1
|
|
|
|
cp 0x01
|
|
|
|
jr nz, .error
|
|
|
|
ld a, 0b01101001 ; CMD41 (0x40000000)
|
|
|
|
ld hl, 0x4000
|
|
|
|
ld de, 0x0000
|
|
|
|
call sdcCmdR1
|
|
|
|
cp 0x01
|
|
|
|
jr z, .loop2
|
|
|
|
or a ; cp 0
|
|
|
|
jr nz, .error
|
|
|
|
; Success! out of idle mode!
|
2019-05-30 14:55:38 -04:00
|
|
|
jr .end
|
2019-05-08 16:03:54 -04:00
|
|
|
|
|
|
|
.error:
|
|
|
|
ld a, 0x01
|
|
|
|
.end:
|
|
|
|
pop bc
|
|
|
|
pop de
|
|
|
|
pop hl
|
|
|
|
ret
|
2019-05-08 20:08:17 -04:00
|
|
|
|
2019-06-15 13:41:20 -04:00
|
|
|
; Read block index specified in DE and place the contents in buffer pointed to
|
2019-06-06 15:57:32 -04:00
|
|
|
; by (SDC_BUFPTR).
|
2019-06-18 22:03:48 -04:00
|
|
|
; If the operation is a success, updates buffer's sector to the value of DE.
|
|
|
|
; After a block read, check that CRC given by the card matches the content. If
|
|
|
|
; it doesn't, retries up to SDC_MAXTRIES times.
|
2019-05-08 20:08:17 -04:00
|
|
|
; Returns 0 in A if success, non-zero if error.
|
|
|
|
sdcReadBlk:
|
2019-06-18 22:03:48 -04:00
|
|
|
xor a
|
|
|
|
ld (SDC_RETRYCNT), a
|
2019-06-19 13:22:07 -04:00
|
|
|
|
2019-05-08 20:08:17 -04:00
|
|
|
push bc
|
2019-05-09 10:47:57 -04:00
|
|
|
push hl
|
2019-05-08 20:08:17 -04:00
|
|
|
|
|
|
|
out (SDC_PORT_CSLOW), a
|
2019-06-19 13:22:07 -04:00
|
|
|
.retry:
|
2019-06-15 13:41:20 -04:00
|
|
|
ld hl, 0
|
|
|
|
; DE already has the correct value
|
2019-05-08 20:08:17 -04:00
|
|
|
ld a, 0b01010001 ; CMD17
|
|
|
|
call sdcCmd
|
|
|
|
or a ; cp 0
|
|
|
|
jr nz, .error
|
|
|
|
|
|
|
|
; Command sent, no error, now let's wait for our data response.
|
|
|
|
ld b, 20
|
|
|
|
.loop1:
|
|
|
|
call sdcWaitResp
|
|
|
|
; 0xfe is the expected data token for CMD17
|
|
|
|
cp 0xfe
|
|
|
|
jr z, .loop1end
|
|
|
|
cp 0xff
|
|
|
|
jr nz, .error
|
|
|
|
djnz .loop1
|
|
|
|
jr .error ; timeout. error out
|
|
|
|
.loop1end:
|
|
|
|
; We received our data token!
|
2019-06-18 15:21:58 -04:00
|
|
|
; Data packets follow immediately, we have 512+CRC of them to read
|
|
|
|
ld bc, SDC_BLKSIZE+2
|
2019-06-06 15:57:32 -04:00
|
|
|
ld hl, (SDC_BUFPTR) ; HL --> active buffer's sector
|
|
|
|
; It sounds a bit wrong to set bufsec and dirty flag before we get our
|
|
|
|
; actual data, but at this point, we don't have any error conditions
|
|
|
|
; left, success is guaranteed. To avoid needlesssly INCing hl, let's
|
|
|
|
; set sector and dirty along the way
|
2019-06-19 09:24:16 -04:00
|
|
|
ld (hl), e ; sector number LSB
|
|
|
|
inc hl
|
|
|
|
ld (hl), d ; sector number MSB
|
2019-06-06 15:57:32 -04:00
|
|
|
inc hl ; dirty flag
|
|
|
|
xor a ; unset
|
|
|
|
ld (hl), a
|
|
|
|
inc hl ; actual contents
|
2019-05-08 20:08:17 -04:00
|
|
|
.loop2:
|
2019-05-31 21:33:42 -04:00
|
|
|
call sdcIdle
|
2019-05-08 20:08:17 -04:00
|
|
|
ld (hl), a
|
|
|
|
cpi ; a trick to inc HL and dec BC at the same time.
|
|
|
|
; P/V indicates whether BC reached 0
|
|
|
|
jp pe, .loop2 ; BC is not zero, loop
|
2019-06-18 22:03:48 -04:00
|
|
|
; Success! while the card is busy, let's get busy too: let's check and
|
|
|
|
; see if the CRC matches.
|
|
|
|
push de ; <|
|
|
|
|
call sdcCRC ; |
|
|
|
|
; before we check the CRC r|esults, let's wait until card is ready
|
|
|
|
call sdcWaitReady ; |
|
|
|
|
; check CRC results |
|
|
|
|
ld a, (hl) ; |
|
|
|
|
cp d ; |
|
|
|
|
jr nz, .crcMismatch ; |
|
|
|
|
inc hl ; |
|
|
|
|
ld a, (hl) ; |
|
|
|
|
cp e ; |
|
|
|
|
jr nz, .crcMismatch ; |
|
|
|
|
pop de ; <|
|
|
|
|
; Everything is fine and dandy!
|
2019-06-10 15:13:46 -04:00
|
|
|
xor a ; success
|
2019-05-08 20:08:17 -04:00
|
|
|
jr .end
|
2019-06-18 22:03:48 -04:00
|
|
|
.crcMismatch:
|
|
|
|
; CRC of the buffer's content doesn't match the CRC reported by the
|
|
|
|
; card. Let's retry.
|
|
|
|
pop de ; from the push right before call sdcCRC
|
|
|
|
ld a, (SDC_RETRYCNT)
|
|
|
|
inc a
|
|
|
|
ld (SDC_RETRYCNT), a
|
|
|
|
cp SDC_MAXTRIES
|
2019-06-19 13:22:07 -04:00
|
|
|
jr nz, .retry ; we jump inside our main stack push. No need
|
|
|
|
; to pop it.
|
|
|
|
; Continue to error condition. Even if we went through many retries,
|
|
|
|
; our stack is still the same as it was at the first call. We can return
|
|
|
|
; normally (but in error condition).
|
2019-05-08 20:08:17 -04:00
|
|
|
.error:
|
|
|
|
; try to preserve error code
|
|
|
|
or a ; cp 0
|
|
|
|
jr nz, .end ; already non-zero
|
|
|
|
inc a ; zero, adjust
|
|
|
|
.end:
|
|
|
|
out (SDC_PORT_CSHIGH), a
|
2019-05-09 10:47:57 -04:00
|
|
|
pop hl
|
2019-05-08 20:08:17 -04:00
|
|
|
pop bc
|
|
|
|
ret
|
2019-05-09 10:47:57 -04:00
|
|
|
|
2019-06-06 15:57:32 -04:00
|
|
|
; Write the contents of buffer where (SDC_BUFPTR) points to in sector associated
|
|
|
|
; to it. Unsets the the buffer's dirty flag on success.
|
2019-06-19 09:00:50 -04:00
|
|
|
; Before writing the block, update the buffer's CRC field so that the correct
|
|
|
|
; CRC is sent.
|
2019-06-01 19:53:42 -04:00
|
|
|
; A returns 0 in A on success (with Z set), non-zero (with Z unset) on error.
|
|
|
|
sdcWriteBlk:
|
2019-06-19 09:00:50 -04:00
|
|
|
push ix
|
|
|
|
ld ix, (SDC_BUFPTR) ; HL points to sector LSB
|
2019-06-06 15:57:32 -04:00
|
|
|
xor a
|
2019-06-19 09:00:50 -04:00
|
|
|
cp (ix+2) ; dirty flag
|
2019-06-19 09:24:16 -04:00
|
|
|
pop ix
|
2019-06-19 13:22:07 -04:00
|
|
|
ret z ; don't write if dirty flag is zero
|
2019-06-06 15:57:32 -04:00
|
|
|
|
2019-06-01 19:53:42 -04:00
|
|
|
push bc
|
2019-06-06 15:57:32 -04:00
|
|
|
push de
|
2019-06-19 09:00:50 -04:00
|
|
|
push hl
|
|
|
|
|
|
|
|
call sdcCRC ; DE -> new CRC. HL -> pointer to buf CRC
|
2019-06-19 09:24:16 -04:00
|
|
|
ld (hl), d ; write computed CRC
|
2019-06-19 09:00:50 -04:00
|
|
|
inc hl
|
2019-06-19 09:24:16 -04:00
|
|
|
ld (hl), e
|
2019-05-09 10:47:57 -04:00
|
|
|
|
2019-06-01 19:53:42 -04:00
|
|
|
out (SDC_PORT_CSLOW), a
|
2019-06-19 09:24:16 -04:00
|
|
|
ld hl, (SDC_BUFPTR) ; sector LSB
|
|
|
|
ld e, (hl) ; sector LSB
|
|
|
|
inc hl
|
|
|
|
ld d, (hl) ; sector MSB
|
2019-06-15 13:41:20 -04:00
|
|
|
ld hl, 0 ; high addr word always zero, DE already set
|
2019-06-01 19:53:42 -04:00
|
|
|
ld a, 0b01011000 ; CMD24
|
|
|
|
call sdcCmd
|
|
|
|
or a ; cp 0
|
|
|
|
jr nz, .error
|
2019-05-09 10:47:57 -04:00
|
|
|
|
2019-06-01 19:53:42 -04:00
|
|
|
; Before sending the data packet, we need to send at least one empty
|
|
|
|
; byte.
|
2019-06-19 09:00:50 -04:00
|
|
|
call sdcIdle
|
2019-06-01 19:53:42 -04:00
|
|
|
|
|
|
|
; data packet token for CMD24
|
|
|
|
ld a, 0xfe
|
|
|
|
call sdcSendRecv
|
|
|
|
|
|
|
|
; Sending our data token!
|
2019-06-18 15:21:58 -04:00
|
|
|
ld bc, SDC_BLKSIZE+2 ; +2 for CRC. (as of now, however, that
|
|
|
|
; CRC isn't properly updated. Because
|
|
|
|
; CMD59 isn't enabled, it doesn't
|
|
|
|
; matter)
|
2019-06-06 15:57:32 -04:00
|
|
|
ld hl, (SDC_BUFPTR)
|
2019-06-15 13:41:20 -04:00
|
|
|
inc hl ; sector MSB
|
2019-06-06 15:57:32 -04:00
|
|
|
inc hl ; dirty flag
|
|
|
|
inc hl ; beginning of contents
|
|
|
|
|
2019-06-01 19:53:42 -04:00
|
|
|
.loop:
|
|
|
|
ld a, (hl)
|
|
|
|
call sdcSendRecv
|
|
|
|
cpi ; a trick to inc HL and dec BC at the same time.
|
|
|
|
; P/V indicates whether BC reached 0
|
|
|
|
jp pe, .loop ; BC is not zero, loop
|
|
|
|
; Let's see what response we have
|
|
|
|
call sdcWaitResp
|
|
|
|
and 0b00011111 ; We ignore the first 3 bits of the response.
|
|
|
|
cp 0b00000101 ; A valid response is "010" in bits 3:1 flanked
|
|
|
|
; by 0 on its left and 1 on its right.
|
|
|
|
jr nz, .error
|
|
|
|
; good! Now, we need to let the card process this data. It will return
|
|
|
|
; 0xff when it's not busy any more.
|
|
|
|
call sdcWaitResp
|
2019-06-06 22:16:28 -04:00
|
|
|
; Success! Now let's unset the dirty flag
|
2019-06-06 15:57:32 -04:00
|
|
|
ld hl, (SDC_BUFPTR)
|
2019-06-15 13:41:20 -04:00
|
|
|
inc hl ; sector MSB
|
2019-06-06 15:57:32 -04:00
|
|
|
inc hl ; dirty flag
|
2019-06-01 19:53:42 -04:00
|
|
|
xor a
|
2019-06-06 15:57:32 -04:00
|
|
|
ld (hl), a
|
2019-06-07 14:59:53 -04:00
|
|
|
|
|
|
|
; Before returning, wait until card is ready
|
|
|
|
call sdcWaitReady
|
2019-06-10 15:13:46 -04:00
|
|
|
xor a
|
2019-06-01 19:53:42 -04:00
|
|
|
jr .end
|
|
|
|
.error:
|
|
|
|
; try to preserve error code
|
|
|
|
or a ; cp 0
|
|
|
|
jr nz, .end ; already non-zero
|
|
|
|
inc a ; zero, adjust
|
|
|
|
.end:
|
|
|
|
out (SDC_PORT_CSHIGH), a
|
2019-06-19 09:00:50 -04:00
|
|
|
pop hl
|
2019-06-06 15:57:32 -04:00
|
|
|
pop de
|
2019-06-01 19:53:42 -04:00
|
|
|
pop bc
|
|
|
|
ret
|
|
|
|
|
2019-06-15 13:41:20 -04:00
|
|
|
; Considering the first 15 bits of EHL, select the most appropriate of our two
|
2019-06-06 22:16:28 -04:00
|
|
|
; buffers and, if necessary, sync that buffer with the SD card. If the selected
|
2019-06-15 13:41:20 -04:00
|
|
|
; buffer doesn't have the same sector as what EHL asks, load that buffer from
|
2019-06-06 22:16:28 -04:00
|
|
|
; the SD card.
|
2019-06-06 15:57:32 -04:00
|
|
|
; If the dirty flag is set, we write the content of the in-memory buffer to the
|
|
|
|
; SD card before we read a new sector.
|
2019-06-01 19:53:42 -04:00
|
|
|
; Returns Z on success, not-Z on error (with the error code from either
|
|
|
|
; sdcReadBlk or sdcWriteBlk)
|
|
|
|
sdcSync:
|
2019-06-15 13:41:20 -04:00
|
|
|
push de
|
|
|
|
; Given a 24-bit address in EHL, extracts the 15-bit sector from it and
|
|
|
|
; place it in DE.
|
|
|
|
; We need to shift both E and H right by one bit
|
|
|
|
srl e ; sets Carry
|
|
|
|
ld d, e
|
2019-06-04 11:53:02 -04:00
|
|
|
ld a, h
|
2019-06-15 13:41:20 -04:00
|
|
|
rra ; takes Carry
|
|
|
|
ld e, a
|
|
|
|
|
2019-06-06 22:16:28 -04:00
|
|
|
; Let's first see if our first buffer has our sector
|
2019-06-15 13:41:20 -04:00
|
|
|
ld a, (SDC_BUFSEC1) ; sector LSB
|
|
|
|
cp e
|
|
|
|
jr nz, .notBuf1
|
|
|
|
ld a, (SDC_BUFSEC1+1) ; sector MSB
|
|
|
|
cp d
|
2019-06-06 22:16:28 -04:00
|
|
|
jr z, .buf1Ok
|
|
|
|
|
2019-06-15 13:41:20 -04:00
|
|
|
.notBuf1:
|
2019-06-06 22:16:28 -04:00
|
|
|
; Ok, let's check for buf2 then
|
2019-06-15 13:41:20 -04:00
|
|
|
ld a, (SDC_BUFSEC2) ; sector LSB
|
|
|
|
cp e
|
|
|
|
jr nz, .notBuf2
|
|
|
|
ld a, (SDC_BUFSEC2+1) ; sector MSB
|
|
|
|
cp d
|
2019-06-06 22:16:28 -04:00
|
|
|
jr z, .buf2Ok
|
|
|
|
|
2019-06-15 13:41:20 -04:00
|
|
|
.notBuf2:
|
2019-06-06 22:16:28 -04:00
|
|
|
; None of our two buffers have the sector we need, we'll need to load
|
|
|
|
; a new one.
|
|
|
|
|
|
|
|
; We select our buffer depending on which is dirty. If both are on the
|
|
|
|
; same status of dirtiness, we pick any (the first in our case). If one
|
|
|
|
; of them is dirty, we pick the clean one.
|
2019-06-15 13:41:20 -04:00
|
|
|
push de ; <|
|
|
|
|
ld de, SDC_BUFSEC1 ; |
|
|
|
|
ld a, (SDC_BUFDIRTY1) ; |
|
|
|
|
or a ; | is buf1 dirty?
|
|
|
|
jr z, .ready ; | no? good, that's our buffer
|
|
|
|
; yes? then buf2 is our buffer. ; |
|
|
|
|
ld de, SDC_BUFSEC2 ; |
|
|
|
|
; |
|
|
|
|
.ready: ; |
|
|
|
|
; At this point, DE points to one o|f our two buffers, the good one.
|
|
|
|
; Let's save it to SDC_BUFPTR |
|
|
|
|
ld (SDC_BUFPTR), de ; |
|
|
|
|
; |
|
|
|
|
pop de ; <|
|
2019-06-06 22:16:28 -04:00
|
|
|
|
2019-06-01 19:53:42 -04:00
|
|
|
; We have to read a new sector, but first, let's write the current one
|
|
|
|
; if needed.
|
|
|
|
call sdcWriteBlk
|
2019-06-15 13:41:20 -04:00
|
|
|
jr nz, .end ; error
|
|
|
|
; Let's read our new sector in DE
|
|
|
|
call sdcReadBlk
|
|
|
|
jr .end
|
2019-06-01 19:53:42 -04:00
|
|
|
|
2019-06-06 22:16:28 -04:00
|
|
|
.buf1Ok:
|
2019-06-15 13:41:20 -04:00
|
|
|
ld de, SDC_BUFSEC1
|
|
|
|
ld (SDC_BUFPTR), de
|
2019-06-15 16:48:30 -04:00
|
|
|
; Z already set
|
2019-06-15 13:41:20 -04:00
|
|
|
jr .end
|
2019-06-06 22:16:28 -04:00
|
|
|
|
|
|
|
.buf2Ok:
|
2019-06-15 13:41:20 -04:00
|
|
|
ld de, SDC_BUFSEC2
|
|
|
|
ld (SDC_BUFPTR), de
|
2019-06-15 16:48:30 -04:00
|
|
|
; Z already set
|
2019-06-15 13:41:20 -04:00
|
|
|
; to .end
|
|
|
|
.end:
|
|
|
|
pop de
|
2019-06-06 22:16:28 -04:00
|
|
|
ret
|
2019-06-01 19:53:42 -04:00
|
|
|
|
2019-06-18 22:03:48 -04:00
|
|
|
; Computes the CRC-16, with polynomial 0x1021 of buffer at (SDC_BUFPTR) and
|
|
|
|
; returns its value in DE. Also, make HL point to the first byte of the CRC
|
|
|
|
; associated to (SDC_BUFPTR).
|
|
|
|
sdcCRC:
|
|
|
|
push af
|
|
|
|
push bc
|
|
|
|
ld hl, (SDC_BUFPTR)
|
|
|
|
inc hl \ inc hl \ inc hl ; HL points to contents
|
|
|
|
ld bc, SDC_BLKSIZE
|
|
|
|
ld de, 0
|
|
|
|
.loop:
|
|
|
|
push bc ; <|
|
|
|
|
ld b, 8 ; |
|
|
|
|
ld a, (hl) ; |
|
|
|
|
xor d ; |
|
|
|
|
ld d, a ; |
|
|
|
|
.inner: ; |
|
|
|
|
sla e ; | Sets Carry
|
|
|
|
rl d ; | Takes and sets carry
|
|
|
|
jr nc, .noCRC ; |
|
|
|
|
; msb was set, apply polyno|mial
|
|
|
|
ld a, d ; |
|
|
|
|
xor 0x10 ; |
|
|
|
|
ld d, a ; |
|
|
|
|
ld a, e ; |
|
|
|
|
xor 0x21 ; |
|
|
|
|
ld e, a ; |
|
|
|
|
.noCRC: ; |
|
|
|
|
djnz .inner ; |
|
|
|
|
pop bc ; <|
|
|
|
|
|
|
|
|
cpi ; inc HL, dec BC, sets P/V on BC=0
|
|
|
|
jp pe, .loop ; BC is not zero, loop
|
|
|
|
; At this point, HL points to the right place: the first byte of the
|
|
|
|
; recorded CRC.
|
|
|
|
pop bc
|
|
|
|
pop af
|
|
|
|
ret
|
|
|
|
|
2019-06-01 19:53:42 -04:00
|
|
|
sdcInitializeCmd:
|
|
|
|
call sdcInitialize
|
2019-06-10 15:13:46 -04:00
|
|
|
ret nz
|
2019-06-19 09:00:50 -04:00
|
|
|
call .setBlkSize
|
|
|
|
ret nz
|
|
|
|
call .enableCRC
|
2019-06-10 15:13:46 -04:00
|
|
|
ret nz
|
|
|
|
; At this point, our buffers are unnitialized. We could have some logic
|
|
|
|
; that determines whether a buffer is initialized in appropriate SDC
|
|
|
|
; routines and act appropriately, but why bother when we could, instead,
|
|
|
|
; just buffer the first two sectors of the card on initialization? This
|
|
|
|
; way, no need for special conditions.
|
|
|
|
; initialize variables
|
|
|
|
ld hl, SDC_BUFSEC1
|
|
|
|
ld (SDC_BUFPTR), hl
|
2019-06-15 13:41:20 -04:00
|
|
|
ld de, 0
|
2019-06-10 15:13:46 -04:00
|
|
|
call sdcReadBlk ; read sector 0 in buf1
|
2019-06-15 13:41:20 -04:00
|
|
|
ret nz
|
2019-06-10 15:13:46 -04:00
|
|
|
ld hl, SDC_BUFSEC2
|
|
|
|
ld (SDC_BUFPTR), hl
|
2019-06-15 13:41:20 -04:00
|
|
|
inc de
|
2019-06-10 15:13:46 -04:00
|
|
|
jp sdcReadBlk ; read sector 1 in buf2, returns
|
2019-06-01 19:53:42 -04:00
|
|
|
|
2019-06-19 09:00:50 -04:00
|
|
|
; Send a command to set block size to SDC_BLKSIZE to the SD card.
|
|
|
|
; Returns zero in A if a success, non-zero otherwise
|
|
|
|
.setBlkSize:
|
|
|
|
push hl
|
|
|
|
push de
|
|
|
|
|
|
|
|
ld a, 0b01010000 ; CMD16
|
|
|
|
ld hl, 0
|
|
|
|
ld de, SDC_BLKSIZE
|
|
|
|
call sdcCmdR1
|
|
|
|
; Since we're out of idle mode, we expect a 0 response
|
|
|
|
; We need no further processing: A is already the correct value.
|
|
|
|
pop de
|
|
|
|
pop hl
|
|
|
|
ret
|
|
|
|
|
|
|
|
; Enable CRC checks through CMD59
|
|
|
|
.enableCRC:
|
|
|
|
push hl
|
|
|
|
push de
|
|
|
|
|
|
|
|
ld a, 0b01111011 ; CMD59
|
|
|
|
ld hl, 0
|
|
|
|
ld de, 1 ; 1 means CRC enabled
|
|
|
|
call sdcCmdR1
|
|
|
|
pop de
|
|
|
|
pop hl
|
|
|
|
ret
|
|
|
|
|
2019-06-01 19:53:42 -04:00
|
|
|
; Flush the current SDC buffer if dirty
|
|
|
|
sdcFlushCmd:
|
2019-06-06 22:16:28 -04:00
|
|
|
ld hl, SDC_BUFSEC1
|
|
|
|
ld (SDC_BUFPTR), hl
|
|
|
|
call sdcWriteBlk
|
|
|
|
ret nz
|
|
|
|
ld hl, SDC_BUFSEC2
|
|
|
|
ld (SDC_BUFPTR), hl
|
2019-06-01 19:53:42 -04:00
|
|
|
jp sdcWriteBlk ; returns
|
|
|
|
|
|
|
|
; *** blkdev routines ***
|
|
|
|
|
2019-06-04 11:53:02 -04:00
|
|
|
; Make HL point to its proper place in SDC_BUF.
|
2019-06-15 13:41:20 -04:00
|
|
|
; EHL currently is a 24-bit offset to read in the SD card. E=high byte,
|
|
|
|
; HL=low word. Load the proper sector in memory and make HL point to the
|
|
|
|
; correct data in the memory buffer.
|
2019-06-01 19:53:42 -04:00
|
|
|
_sdcPlaceBuf:
|
|
|
|
call sdcSync
|
|
|
|
ret nz ; error
|
2019-06-15 13:41:20 -04:00
|
|
|
; At this point, we have the proper buffer in place and synced in
|
|
|
|
; (SDC_BUFPTR). Only the 9 low bits of HL are important.
|
2019-06-06 15:57:32 -04:00
|
|
|
push de
|
|
|
|
ld de, (SDC_BUFPTR)
|
2019-06-17 13:42:53 -04:00
|
|
|
inc de ; sector MSB
|
2019-06-06 15:57:32 -04:00
|
|
|
inc de ; dirty flag
|
|
|
|
inc de ; contents
|
2019-06-04 11:53:02 -04:00
|
|
|
ld a, h ; high byte
|
2019-05-30 14:55:38 -04:00
|
|
|
and 0x01 ; is first bit set?
|
2019-06-06 15:57:32 -04:00
|
|
|
jr z, .read ; first bit reset? we're in the "lowbuf" zone.
|
|
|
|
; DE already points to the right place.
|
|
|
|
; We're in the highbuf zone, let's inc DE by 0x100, which, as it turns
|
|
|
|
; out, is quite easy.
|
|
|
|
inc d
|
2019-05-09 10:47:57 -04:00
|
|
|
.read:
|
2019-06-06 15:57:32 -04:00
|
|
|
; DE is now placed either on the lower or higher half of the active
|
|
|
|
; buffer and all we need is to increase DE the lower half of HL.
|
|
|
|
ld a, l
|
|
|
|
call addDE
|
|
|
|
ex de, hl
|
|
|
|
pop de
|
|
|
|
; Now, HL points exactly at the right byte in the active buffer.
|
2019-06-01 19:53:42 -04:00
|
|
|
xor a ; ensure Z
|
|
|
|
ret
|
|
|
|
|
2019-10-30 16:59:35 -04:00
|
|
|
sdcGetB:
|
2019-06-01 19:53:42 -04:00
|
|
|
push hl
|
|
|
|
call _sdcPlaceBuf
|
2019-12-11 11:18:32 -05:00
|
|
|
jr nz, .end ; NZ already set
|
2019-05-09 10:47:57 -04:00
|
|
|
|
|
|
|
; This is it!
|
|
|
|
ld a, (hl)
|
|
|
|
cp a ; ensure Z
|
2019-06-01 19:53:42 -04:00
|
|
|
.end:
|
|
|
|
pop hl
|
|
|
|
ret
|
2019-05-09 10:47:57 -04:00
|
|
|
|
2019-10-30 16:59:35 -04:00
|
|
|
sdcPutB:
|
2019-06-01 19:53:42 -04:00
|
|
|
push hl
|
|
|
|
push af ; let's remember the char we put, _sdcPlaceBuf
|
|
|
|
; destroys A.
|
|
|
|
call _sdcPlaceBuf
|
|
|
|
jr nz, .error
|
|
|
|
|
|
|
|
; HL points to our dest. Recall A and write
|
|
|
|
pop af
|
|
|
|
ld (hl), a
|
|
|
|
|
2019-06-06 22:16:28 -04:00
|
|
|
; Now, let's set the dirty flag
|
2019-06-01 19:53:42 -04:00
|
|
|
ld a, 1
|
2019-06-06 22:16:28 -04:00
|
|
|
ld hl, (SDC_BUFPTR)
|
2019-06-15 13:41:20 -04:00
|
|
|
inc hl ; sector MSB
|
2019-06-06 22:16:28 -04:00
|
|
|
inc hl ; point to dirty flag
|
|
|
|
ld (hl), a ; set dirty flag
|
2019-06-01 19:53:42 -04:00
|
|
|
xor a ; ensure Z
|
|
|
|
jr .end
|
2019-05-09 10:47:57 -04:00
|
|
|
.error:
|
2019-06-10 15:13:46 -04:00
|
|
|
; preserve error code
|
|
|
|
ex af, af'
|
2019-06-01 19:53:42 -04:00
|
|
|
pop af
|
2019-06-10 15:13:46 -04:00
|
|
|
ex af, af'
|
2019-05-09 10:47:57 -04:00
|
|
|
call unsetZ
|
|
|
|
.end:
|
|
|
|
pop hl
|
|
|
|
ret
|