2020-05-01 20:05:15 -04:00
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: ACIA$
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H@ DUP DUP ACIA( ! ACIAR> !
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1+ ACIAW> ! ( write index starts one position later )
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ACIABUFSZ ALLOT
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H@ ACIA) !
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( setup ACIA
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CR7 (1) - Receive Interrupt enabled
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CR6:5 (00) - RTS low, transmit interrupt disabled.
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CR4:2 (101) - 8 bits + 1 stop bit
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CR1:0 (10) - Counter divide: 64 )
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0b10010110 ACIA_CTL PC!
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( setup interrupt )
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0xc3 0x4e RAM+ C! ( c3==JP, 4e==INTJUMP )
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['] ~ACIA 0x4f RAM+ !
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(im1) ;
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