avra: add TOC and instructions list

This commit is contained in:
Virgil Dupras 2020-06-29 08:01:39 -04:00
parent 74e211eeda
commit 1ac7038863
6 changed files with 64 additions and 21 deletions

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AVR assembler AVR assembler
This assembler works very much like Z80 assembler (B200) so 651 Guide 655 Instructions list
refer to this documentation first. Here, we document specifici- 660 Loader 661-672 Code
ties. 672 Common AVR consts
All mnemonics in AVR have a single signature. Therefore, we
don't need any "argtype" suffixes.
Registers are referred to with consts R0-R31. There is
X, Y, Z, X+, Y+, Z+, X-, Y-, Z- for appropriate ops (LD, ST).
XL, XH, YL, YH, ZL, ZH are simple aliases to R26-R31.
Branching works differently. Instead of expecting a byte to be
written after the naked op, branching words expect a displace-
ment argument. (cont.)

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This is because there's bitwise ORing involved in the creation This assembler works very much like Z80 assembler (B200) so
of the final opcode, which makes z80a's approach impractical. refer to this documentation first. Here, we document specifici-
ties.
This makes labelling a bit different too. Instead of expecting All mnemonics in AVR have a single signature. Therefore, we
label words after the naked branching op, we rather have label don't need any "argtype" suffixes.
words expecting branching wordref as an argument. Examples:
L2 ' BRTS FLBL! ( branch forward to L2 ) Registers are referred to with consts R0-R31. There is
L1 ' RJMP LBL, ( branch backward to L1 ) X, Y, Z, X+, Y+, Z+, X-, Y-, Z- for appropriate ops (LD, ST).
XL, XH, YL, YH, ZL, ZH are simple aliases to R26-R31.
Branching works differently. Instead of expecting a byte to be
written after the naked op, branching words expect a displace-
ment argument.
(cont.)

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This is because there's bitwise ORing involved in the creation
of the final opcode, which makes z80a's approach impractical.
This makes labelling a bit different too. Instead of expecting
label words after the naked branching op, we rather have label
words expecting branching wordref as an argument. Examples:
L2 ' BRTS FLBL! ( branch forward to L2 )
L1 ' RJMP LBL, ( branch backward to L1 )

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AVR instructions list
OPRd (B663)
ASR COM DEC INC LAC LAS LAT LSR NEG POP PUSH
ROR SWAP XCH
OPRdRr (B664)
ADC ADD AND CP CPC CPSE EOR MOV MUL OR SBC
SUB
OPRdA (B664)
IN OUT
OPRdK (B665)
ANDI CPI LDI ORI SBCI SBR SUBI
(cont.)

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OPAb (B665)
CBI SBI SBIC SBIS
OPNA (B666)
BREAK CL[C,H,I,N,S,T,V,Z] SE[C,H,I,N,S,T,V,Z] EIJMP ICALL
EICALL IJMP NOP RET RETI SLEEP WDR
OPb (B667)
BCLR BSET
OPRdb (B667)
BLD BST SBRC SBRS
Special (B667,B670)
CLR TST LSL LD ST
(cont.)

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Flow (B668)
RJMP RCALL
BR[BC,BS,CC,CS,EQ,NE,GE,HC,HS,ID,IE,LO,LT,MI,PL,SH,TC,TS,VC,VS]
Flow macros (B671)
LBL! LBL, SKIP, TO, FLBL, FLBL! BEGIN, AGAIN? AGAIN, IF, THEN,