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@@ -32,10 +32,23 @@ Y: pointer to the memory location where the next scan code from |
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ps/2 will be written. |
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Z: pointer to the next scan code to push to the 595 ) |
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0x0060 CONSTANT SRAM_START |
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0x015f CONSTANT RAMEND |
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0x3d CONSTANT SPL |
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0x3e CONSTANT SPH |
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0x11 CONSTANT GPIOR0 |
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0x35 CONSTANT MCUCR |
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0x33 CONSTANT TCCR0B |
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0x3b CONSTANT GIMSK |
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0x16 CONSTANT PINB |
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0x17 CONSTANT DDRB |
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0x18 CONSTANT PORTB |
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2 CONSTANT CLK |
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1 CONSTANT DATA |
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3 CONSTANT CP |
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0 CONSTANT LQ |
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4 CONSTANT LR |
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0x100-100 CONSTANT TIMER_INITVAL |
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H@ ORG ! |
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L1 FLBL, ( main ) |
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@@ -51,3 +64,35 @@ RETI, |
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RJMPOP L1 FLBL! ( main ) |
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16 RAMEND 0xff AND LDI, |
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SPL 16 OUT, |
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16 RAMEND 8 RSHIFT LDI, |
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SPH 16 OUT, |
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( init variables ) |
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18 CLR, |
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GPIOR0 18 OUT, |
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( Setup int0 |
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INT0, falling edge ) |
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16 0x02 ( ISC01 ) LDI, |
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MCUCR 16 OUT, |
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( Enable INT0 ) |
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16 0x40 ( INT0 ) LDI, |
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GIMSK 16 OUT, |
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( Setup buffer ) |
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29 ( YH ) CLR, |
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28 ( YL ) SRAM_START 0xff AND LDI, |
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31 ( ZH ) CLR, |
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30 ( ZL ) SRAM_START 0xff AND LDI, |
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( Setup timer. We use the timer to clear up "processbit" |
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registers after 100us without a clock. This allows us to start |
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the next frame in a fresh state. at 1MHZ, no prescaling is |
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necessary. Each TCNT0 tick is already 1us long. ) |
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16 0x01 ( CS00 ) LDI, ( no prescaler ) |
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TCCR0B 16 OUT, |
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( init DDRB ) |
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DDRB CP SBI, |
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PORTB LR CBI, |
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DDRB LR SBI, |
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SEI, |
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L1 LBL! ( loop ) |
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