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Author	SHA1	Message	Date
Virgil Dupras	46676547d9	spi: add SPI_DELAY decl AVR chips often run at less than z80's system clock. This means that our SPI relay needs to have its own clock to properly communicate with it. This means that the delay between OUT and IN can't be hardcoded to 2 NOPs anymore. It needs to be configurable.	2020-08-23 07:55:17 -04:00
Virgil Dupras	f09aa0603c	rc2014: separate SPI relay and SDC drivers My intention is to reuse the SPI relay to program AVR MCUs from a RC2014.	2020-06-29 18:48:00 -04:00

Author

SHA1

Message

Date

Virgil Dupras

46676547d9

spi: add SPI_DELAY decl

AVR chips often run at less than z80's system clock. This means that
our SPI relay needs to have its own clock to properly communicate
with it. This means that the delay between OUT and IN can't be
hardcoded to 2 NOPs anymore. It needs to be configurable.

2020-08-23 07:55:17 -04:00

Virgil Dupras

f09aa0603c

rc2014: separate SPI relay and SDC drivers

My intention is to reuse the SPI relay to program AVR MCUs from a
RC2014.

2020-06-29 18:48:00 -04:00

2 Commits