xolatilization/xanual/idiv.md

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IDIV - Signed Divide

Description

Divides the (signed) value in the AX, DX:AX, or EDX:EAX (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, or EDX:EAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor).

Instruction

Opcode Assembly Op/En Modern Mode Legacy Mode Description
F6 /7 IDIV r/m8 M Valid Valid Signed divide AX by r/m8, result in: AL=Quotient, AH=Remainder.
REX + F6 /7 IDIV r/m8* M Valid N.E. Signed divide AX by r/m8, result in AL=Quotient, AH=Remainder.
F7 /7 IDIV r/m16 M Valid Valid Signed divide DX:AX by r/m16, result in AX=Quotient, DX=Remainder.
F7 /7 IDIV r/m32 M Valid Valid Signed divide EDX:EAX by r/m32, result in EAX=Quotient, EDX=Remainder.
REX.W + F7 /7 IDIV r/m64 M Valid N.E. Signed divide RDX:RAX by r/m64, result in RAX=Quotient, RDX=Remainder.
  • In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.

Information

Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magni- tude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.

In 64-bit mode, the instructions default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the signed value in RDX:RAX by the source operand. RAX contains a 64-bit quotient; RDX contains a 64-bit remainder.