79 lines
8.2 KiB
Markdown
Executable File
79 lines
8.2 KiB
Markdown
Executable File
# MOV — Move
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## Description
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Copies the second operand (source operand) to the first operand (destination operand). The source operand can be an immediate value,
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general-purpose register, segment register, or memory location; the destination register can be a general-purpose register, segment register,
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or memory location. Both operands must be the same size, which can be a byte, a word, a doubleword, or a quadword.
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## Instruction
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| Opcode | Assembly | Op/En | Modern Mode | Legacy Mode | Description |
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|-------------------|-------------------|-------|-------------|-------------|------------------------------------------------------------------|
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| 88 /r | MOV r/m8,r8 | MR | Valid | Valid | Move r8 to r/m8. |
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| REX + 88 /r | MOV r/m8***,r8*** | MR | Valid | N.E. | Move r8 to r/m8. |
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| 89 /r | MOV r/m16,r16 | MR | Valid | Valid | Move r16 to r/m16. |
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| 89 /r | MOV r/m32,r32 | MR | Valid | Valid | Move r32 to r/m32. |
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| REX.W + 89 /r | MOV r/m64,r64 | MR | Valid | N.E. | Move r64 to r/m64. |
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| 8A /r | MOV r8,r/m8 | RM | Valid | Valid | Move r/m8 to r8. |
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| REX + 8A /r | MOV r8***,r/m8*** | RM | Valid | N.E. | Move r/m8 to r8. |
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| 8B /r | MOV r16,r/m16 | RM | Valid | Valid | Move r/m16 to r16. |
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| 8B /r | MOV r32,r/m32 | RM | Valid | Valid | Move r/m32 to r32. |
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| REX.W + 8B /r | MOV r64,r/m64 | RM | Valid | N.E. | Move r/m64 to r64. |
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| 8C /r | MOV r/m16,Sreg** | MR | Valid | Valid | Move segment register to r/m16. |
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| REX.W + 8C /r | MOV r/m64,Sreg** | MR | Valid | Valid | Move zero extended 16-bit segment register to r/m64. |
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| 8E /r | MOV Sreg,r/m16** | RM | Valid | Valid | Move r/m16 to segment register. |
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| REX.W + 8E /r | MOV Sreg,r/m64** | RM | Valid | Valid | Move lower 16 bits of r/m64 to segment register. |
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| A0 | MOV AL,moffs8* | FD | Valid | Valid | Move byte at (seg:offset) to AL. |
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| REX.W + A0 | MOV AL,moffs8* | FD | Valid | N.E. | Move byte at (offset) to AL. |
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| A1 | MOV AX,moffs16* | FD | Valid | Valid | Move word at (seg:offset) to AX. |
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| A1 | MOV EAX,moffs32* | FD | Valid | Valid | Move doubleword at (seg:offset) to EAX. |
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| REX.W + A1 | MOV RAX,moffs64* | FD | Valid | N.E. | Move quadword at (offset) to RAX. |
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| A2 | MOV moffs8,AL | TD | Valid | Valid | Move AL to (seg:offset). |
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| REX.W + A2 | MOV moffs8***,AL | TD | Valid | N.E. | Move AL to (offset). |
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| A3 | MOV moffs16*,AX | TD | Valid | Valid | Move AX to (seg:offset). |
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| A3 | MOV moffs32*,EAX | TD | Valid | Valid | Move EAX to (seg:offset). |
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| REX.W + A3 | MOV moffs64*,RAX | TD | Valid | N.E. | Move RAX to (offset). |
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| B0+ rb ib | MOV r8, imm8 | OI | Valid | Valid | Move imm8 to r8. |
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| REX + B0+ rb ib | MOV r8***, imm8 | OI | Valid | N.E. | Move imm8 to r8. |
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| B8+ rw iw | MOV r16, imm16 | OI | Valid | Valid | Move imm16 to r16. |
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| B8+ rd id | MOV r32, imm32 | OI | Valid | Valid | Move imm32 to r32. |
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| REX.W + B8+ rd io | MOV r64, imm64 | OI | Valid | N.E. | Move imm64 to r64. |
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| C6 /0 ib | MOV r/m8, imm8 | MI | Valid | Valid | Move imm8 to r/m8. |
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| REX + C6 /0 ib | MOV r/m8***, imm8 | MI | Valid | N.E. | Move imm8 to r/m8. |
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| C7 /0 iw | MOV r/m16, imm16 | MI | Valid | Valid | Move imm16 to r/m16. |
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| C7 /0 id | MOV r/m32, imm32 | MI | Valid | Valid | Move imm32 to r/m32. |
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| REX.W + C7 /0 id | MOV r/m64, imm32 | MI | Valid | N.E. | Move imm32 sign extended to 64-bits to r/m64. |
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- The moffs8, moffs16, moffs32 and moffs64 operands specify a simple offset relative to the segment base, where 8, 16, 32 and 64 refer to the
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size of the data. The address-size attribute of the instruction determines the size of the offset, either 16, 32 or 64 bits.
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- In 32-bit mode, the assembler may insert the 16-bit operand-size prefix with this instruction.
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- In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.
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## Information
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The MOV instruction cannot be used to load the CS register. Attempting to do so results in an invalid opcode exception (#UD). To load the CS
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register, use the far JMP, CALL, or RET instruction.
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If the destination operand is a segment register (DS, ES, FS, GS, or SS), the source operand must be a valid segment selector. In protected
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mode, moving a segment selector into a segment register automatically causes the segment descriptor information associated with that segment
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selector to be loaded into the hidden (shadow) part of the segment register. While loading this information, the segment selector and segment
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descriptor information is validated (see the "Operation" algorithm below). The segment descriptor data is obtained from the GDT or LDT entry
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for the specified segment selector.
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A NULL segment selector (values 0000-0003) can be loaded into the DS, ES, FS, and GS registers without causing a protection exception. However,
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any subsequent attempt to reference a segment whose corresponding segment register is loaded with a NULL value causes a general protection
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exception (#GP) and no memory reference occurs. Loading the SS register with a MOV instruction inhibits all interrupts until after the
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execution of the next instruc- tion. This operation allows a stack pointer to be loaded into the ESP register with the next instruction (MOV
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ESP, stack-pointer value) before an interrupt occurs. Be aware that the LSS instruction offers a more efficient method of loading the SS and
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ESP registers.
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When executing MOV Reg, Sreg, the processor copies the content of Sreg to the 16 least significant bits of the general-purpose register. The
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upper bits of the destination register are zero for most IA-32 processors (Pentium Pro processors and later) and all Intel 64 processors, with
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the exception that bits 31:16 are undefined for Intel Quark X1000 processors, Pentium and earlier processors.
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In 64-bit mode, the instruction's default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15).
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Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.
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