5.6 KiB
Executable File
IMUL - Signed Multiply
Description
Performs a signed multiplication of two operands. This instruction has three forms, depending on the number of operands. It's very different from its unsigned version, which is similar to signed and unsigned division.
Instruction
| Opcode | Assembly | Op/En | Modern Mode | Legacy Mode | Description |
|---|---|---|---|---|---|
| F6 /5 | IMUL r/m8* | M | Valid | Valid | AX=AL*r/m byte. |
| F7 /5 | IMUL r/m16 | M | Valid | Valid | DX:AX=AX*r/m word. |
| F7 /5 | IMUL r/m32 | M | Valid | Valid | EDX:EAX=EAX*r/m32. |
| REX.W + F7 /5 | IMUL r/m64 | M | Valid | N.E. | RDX:RAX=RAX*r/m64. |
| 0F AF /r | IMUL r16, r/m16 | RM | Valid | Valid | Word stores word register*r/m16. |
| 0F AF /r | IMUL r32, r/m32 | RM | Valid | Valid | Doubleword stores doubleword register*r/m32. |
| REX.W + 0F AF /r | IMUL r64, r/m64 | RM | Valid | N.E. | Quadword stores Quadword register*r/m64. |
| 6B /r ib | IMUL r16, r/m16, imm8 | RMI | Valid | Valid | Word stores r/m16*sign-extended immediate byte. |
| 6B /r ib | IMUL r32, r/m32, imm8 | RMI | Valid | Valid | doubleword stores r/m32*sign-extended immediate byte. |
| REX.W + 6B /r ib | IMUL r64, r/m64, imm8 | RMI | Valid | N.E. | Quadword stores r/m64*sign-extended immediate byte. |
| 69 /r iw | IMUL r16, r/m16, imm16 | RMI | Valid | Valid | Word stores r/m16*immediate word. |
| 69 /r id | IMUL r32, r/m32, imm32 | RMI | Valid | Valid | Doubleword stores r/m32*immediate doubleword. |
| REX.W + 69 /r id | IMUL r64, r/m64, imm32 | RMI | Valid | N.E. | Quadword stores r/m64*immediate doubleword. |
- In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.
Information
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One-operand form — This form is identical to that used by the MUL instruction. Here, the source operand (in a general-purpose register or memory location) is multiplied by the value in the AL, AX, EAX, or RAX register (depending on the operand size) and the product (twice the size of the input operand) is stored in the AX, DX:AX, EDX:EAX, or RDX:RAX registers, respectively.
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Two-operand form — With this form the destination operand (the first operand) is multiplied by the source operand (second operand). The destination operand is a general-purpose register and the source operand is an immediate value, a general-purpose register, or a memory location. The intermediate product (twice the size of the input operand) is truncated and stored in the destination operand location.
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Three-operand form — This form requires a destination operand (the first operand) and two source operands (the second and the third operands). Here, the first source operand (which can be a general-purpose register or a memory location) is multiplied by the second source operand (an immediate value). The intermediate product (twice the size of the first source operand) is truncated and stored in the destination operand (a general-purpose register).
When an immediate value is used as an operand, it is sign-extended to the length of the destination operand format.
The CF and OF flags are set when the signed integer value of the intermediate product differs from the sign extended operand-size-truncated product, otherwise the CF and OF flags are cleared.
The three forms of the IMUL instruction are similar in that the length of the product is calculated to twice the length of the operands. With the one-operand form, the product is stored exactly in the destination. With the two- and three- operand forms, however, the result is truncated to the length of the destination before it is stored in the destination register. Because of this truncation, the CF or OF flag should be tested to ensure that no significant bits are lost.
The two- and three-operand forms may also be used with unsigned operands because the lower half of the product is the same regardless if the operands are signed or unsigned. The CF and OF flags, however, cannot be used to determine if the upper half of the result is non-zero.
In 64-bit mode, the instruction’s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. Use of REX.W modifies the three forms of the instruction as follows.
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One-operand form —The source operand (in a 64-bit general-purpose register or memory location) is multiplied by the value in the RAX register and the product is stored in the RDX:RAX registers.
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Two-operand form — The source operand is promoted to 64 bits if it is a register or a memory location. The destination operand is promoted to 64 bits.
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Three-operand form — The first source operand (either a register or a memory location) and destination operand are promoted to 64 bits. If the source operand is an immediate, it is sign extended to 64 bits.